Datasheet

HEF4794B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 16 November 2011 7 of 18
NXP Semiconductors
HEF4794B
8-stage shift-and-store register LED driver
10. Dynamic characteristics
Table 7. Dynamic characteristics
V
SS
= 0 V; T
amb
= 25  C unless otherwise specified. For test circuit, see Figure 10.
Symbol Parameter Conditions V
DD
Extrapolation formula Min Typ Max Unit
t
PHL
HIGH to LOW
propagation delay
CP to QS1;
see Figure 6
5 V
[1]
132 ns + (0.55 ns/pF)C
L
-160320ns
10 V 53 ns + (0.23 ns/pF)C
L
- 65 130 ns
15 V 37 ns + (0.16 ns/pF)C
L
- 4590ns
CP to QS2;
see Figure 6
5 V 92 ns + (0.55 ns/pF)C
L
-120240ns
10 V 39 ns + (0.23 ns/pF)C
L
- 50 100 ns
15 V 32 ns + (0.16 ns/pF)C
L
- 4080ns
t
PLH
LOW to HIGH
propagation delay
CP to QS1;
see Figure 6
5 V
[1]
102 ns + (0.55 ns/pF)C
L
-130260ns
10 V 44 ns + (0.23 ns/pF)C
L
-55110ns
15 V 32 ns + (0.16 ns/pF)C
L
- 4080ns
CP to QS2;
see Figure 6
5 V 102 ns + (0.55 ns/pF)C
L
-130260ns
10 V 49 ns + (0.23 ns/pF)C
L
- 60 120 ns
15 V 37 ns + (0.16 ns/pF)C
L
- 4590ns
t
PZL
OFF-state to LOW
propagation delay
CP to QPn;
see Figure 6
5 V - 240 480 ns
10 V - 80 160 ns
15 V - 55 110 ns
STR to QPn;
see Figure 7
5 V - 140 280 ns
10 V - 70 140 ns
15 V - 55 110 ns
t
PLZ
LOW to OFF-state
propagation delay
CP to QPn;
see Figure 6
5 V - 170 340 ns
10 V - 75 150 ns
15 V - 60 120 ns
STR to QPn;
see Figure 7
5 V - 100 200 ns
10 V - 40 100 ns
15 V - 35 70 ns
t
en
enable time OE to QPn;
see Figure 8
5 V
[2]
-100200ns
10 V - 55 110 ns
15 V - 50 100 ns
t
dis
disable time OE to QPn;
see Figure 8
5 V
[2]
- 80 160 ns
10 V - 40 80 ns
15 V - 30 60 ns
t
t
transition time QS1, QS2;
see Figure 6
5 V
[1]
[3]
35 ns + (1.00 ns/pF)C
L
- 85 170 ns
10 V 19 ns + (0.42 ns/pF)C
L
- 4080ns
15 V 16 ns + (0.28 ns/pF)C
L
- 3060ns