User's Manual

Table Of Contents

User manual Rev. 1.0 — 15 June 2016 12 of 24

NXP Semiconductors

UM11016

ZigBee PRO and IEEE802.15.4 JN5169-001-M0x-2 modules

[1] P = power supply; G = ground; I = input, O = output; I/O = input/output.

[2] JTAG programming mode: must be left floating high during reset to avoid entering JTAG programming mode.

[3] UART programming mode: leave pin floating high during reset to avoid entering UART programming mode or hold it low to program.

[4] Not available on the JN5169-001-M06-2 since they are used to control the front-end module.

[5] Multi-function: DIO12/PWM2/CTS0/JTAG_TCK/ADO/SPISMOSI.

[6] Multi-function: DIO13/PWM3/RTS0/JTAG_TMS/ADE/SPISMISO.

[7] Multi-function: DIO14/SIF_CLK/TXD0/TXD1/JTAG_TDO/SPISEL1/SPISSEL.

[8] Multi-function: DIO15/SIF_D/RXD0/RXD1/JTAG_TDI/SPISEL2/SPISCLK.

8. Functional description

8.1 JN5169 single chip wireless microcontroller

The JN5169-001-M0x-2 is constructed around the JN5169-001 single chip wireless

microcontroller, which includes the radio system, a 32-bit RISC CPU, Flash, RAM and

EEPROM memory and a range of analogue and digital peripherals.

The chip is described fully in JN5169 Wireless Microcontroller Datasheet (see Ref. 2

DIO15

[8]

24 I/O DIO15 — DIO15

SIF_D — serial interface data

RXD0 — UART 0 receive data input

RXD1 — UART 1 receive data input

JTAG_TDI — JTAG data input

SPISEL2 — SPI-bus master select output 2

SPISCLK — SPI-bus slave clock input

DIO16/SPISMOSI/SIF_CLK/COMP1P 25 I/O DIO16 — DIO16

COMP1P — comparator positive input

SIF_CLK — Serial Interface clock

SPISMOSI — SPI-bus Slave Master Out Slave In input

DIO17/SPISMISO/SIF_D/COMP1M 26 I/O DIO17 — DIO17

COMP1M — COMP1M; comparator negative input

SIF_D — Serial Interface Data

SPISMISO — SPI-bus Slave Master In Slave Out output

PWM4 — PWM 4 output

VREF/ADC2 27 P VREF — analog peripheral reference voltage

I ADC2 — ADC input 2

Table 4. Pin description

…continued

Symbol Pin Type

[1]

Description