Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 139 of 547
NXP Semiconductors
UM10398
Chapter 8: LPC1100XL series: I/O configuration (IOCONFIG)
8.4.47 IOCON_SSEL1_LOC
8.4.48 IOCON_CT16B0_CAP0_LOC
8.4.49 IOCON_SCK1_LOC
Table 152. IOCON SSEL1 location register (IOCON_SSEL1_LOC, address 0x4004 4018) bit
description
Bit Symbol Value Description Reset
value
1:0 SSEL1LOC Selects pin location for SSEL1 function. 00
0x0 Selects SSEL1 function in pin location
PIO2_0/DTR
/SSEL1 (see Table 107).
0x1 Selects SSEL1 function in pin location
PIO2_4/CT16B1_MAT1/SSEL1 (see Table 120
).
0x2 Reserved.
0x3 Reserved.
31:2 - - Reserved. -
Table 153. IOCON CT16B0_CAP0 location register (IOCON_CT16B0_CAP0_LOC, address
0x4004 40C0) bit description
Bit Symbol Value Description Reset
value
1:0 CT16B0_CAP0LOC Selects pin location for CT16B0_CAP0 function. 00
0x0 Selects CT16B0_CAP0 function in pin location
PIO0_2/SSEL0/CT16B0_CAP0 (see Table 111
).
0x1 Selects CT16B0_CAP0 function in pin location
PIO3_3/RI
/CT16B0 (see Table 147).
0x2 Reserved.
0x3 Reserved.
31:2 - - Reserved. -
Table 154. IOCON SCK1 location register (IOCON_SCK1_LOC, address 0x4004 40C4) bit
description
Bit Symbol Value Description Reset
value
1:0 SCK1LOC Selects pin location for SCK1 function. 00
0x0 Selects SCK1 function in pin location PIO2_1/DSR
/SCK1
(see Table 114
).
0x1 Selects SCK1 function in pin location
PIO3_2/DCD
/CT16B0_MAT2/SCK1 (see Table 143).
0x2 Reserved.
0x3 Reserved.
31:2 - - Reserved. -