Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 16 of 547
NXP Semiconductors
UM10398
Chapter 1: LPC111x/LPC11Cxx Introductory information
(1) Not available on LPC11C22/C24.
Fig 3. LPC11Cxx/LPC11D14 block diagram (LPC1100C series and LPC11D14)
SRAM
8 kB
ARM
CORTEX-M0
TEST/DEBUG
INTERFACE
FLASH
16/32 kB
HIGH-SPEED
GPIO
AHB TO APB
BRIDGE
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
XTALIN
XTALOUT
RESET
clocks and
controls
SWD
LPC11Cxx
LPC11D14
slave
slave
slave slave
ROM
slave
AHB-LITE BUS
GPIO ports
PIO0/1/2/3
CLKOUT
IRC
POR
SPI0
10-bit ADC
UART
32-bit COUNTER/TIMER 0
I
2
C-BUS
WDT
IOCONFIG
CT32B0_MAT[3:0]
AD[7:0]
CT32B0_CAP0
SDA
SCL
RXD
TXD
DTR, DSR, CTS,
DCD, RI, RTS
SYSTEM CONTROL
PMU
32-bit COUNTER/TIMER 1
CT32B1_MAT[3:0]
CT32B1_CAP0
16-bit COUNTER/TIMER 1
CT16B1_MAT[1:0]
(1)
CT16B1_CAP0
16-bit COUNTER/TIMER 0
CT16B0_MAT[2:0]
CT16B0_CAP0
SCK0, SSEL0
MISO0, MOSI0
SCK1, SSEL1
MISO1, MOSI1
SPI1
system bus
C_CAN (LPC11C12/C14)
CAN_TXD
CAN_RXD
C_CAN/
ON-CHIP TRANSCEIVER
(LPC11C22/C24)
CANL, CANH
STB
V
CC
, VDD_CAN