Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 168 of 547
NXP Semiconductors
UM10398
Chapter 10: LPC111x Pin configuration (LPC1100L series, TSSOP, DIP,
Fig 23. Pin configuration TSSOP20 package with I
2
C-bus pins
LPC1111FDH20/002
PIO0_8/MISO0/CT16B0_MAT0 PIO0_4/SCL
PIO0_9/MOSI0/CT16B0_MAT1 PIO0_2/SSEL0/CT16B0_CAP0
SWCLK/PIO0_10/SCK0/CT16B0_MAT2 PIO0_1/CLKOUT/CT32B0_MAT2
R/PIO0_11/AD0/CT32B0_MAT3 RESET/PIO0_0
PIO0_5/SDA V
SS
PIO0_6/SCK0 V
DD
R/PIO1_0/AD1/CT32B1_CAP0 XTALIN
R/PIO1_1/AD2/CT32B1_MAT0 XTALOUT
R/PIO1_2/AD3/CT32B1_MAT1 PIO1_7/TXD/CT32B0_MAT1
SWDIO/PIO1_3/AD4/CT32B1_MAT2 PIO1_6/RXD/CT32B0_MAT0
002aag596
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
Table 166. LPC1110/11/12 pin description table (SO20 and TSSOP20 package with I
2
C-bus pins)
Symbol
Pin SO20/ TSSOP20
Start
logic
input
Type Reset
state
[1]
Description
PIO0_0 to PIO0_11 I/O Port 0 — Port 0 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 0 pins depends
on the function selected through the IOCONFIG register block.
RESET
/PIO0_0 17
[2]
yes I I; PU RESET — External reset input with 20 ns glitch filter. A LOW-going
pulse as short as 50 ns on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0.
In deep power-down mode, this pin must be pulled HIGH externally.
The RESET
pin can be left unconnected or be used as a GPIO pin
if an external RESET function is not needed.
I/O - PIO0_0 — General purpose digital input/output pin with 10 ns glitch
filter.
PIO0_1/CLKOUT/
CT32B0_MAT2
18
[3]
yes I/O I; PU PIO0_1 — General purpose digital input/output pin. A LOW level on
this pin during reset starts the ISP command handler.
O- CLKOUT — Clockout pin.
O- CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
PIO0_2/SSEL0/
CT16B0_CAP0
19
[3]
yes I/O I; PU PIO0_2 — General purpose digital input/output pin.
I/O - SSEL0 — Slave Select for SPI0.
I- CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_4/SCL 20
[4]
yes I/O I; IA PIO0_4 — General purpose digital input/output pin (open-drain).
I/O - SCL — I
2
C-bus, open-drain clock input/output. High-current sink
only if I
2
C Fast-mode Plus is selected in the I/O configuration
register.
PIO0_5/SDA 5
[4]
yes I/O I; IA PIO0_5 — General purpose digital input/output pin (open-drain).
I/O - SDA — I
2
C-bus, open-drain data input/output. High-current sink
only if I
2
C Fast-mode Plus is selected in the I/O configuration
register.
PIO0_6/SCK0 6
[3]
yes I/O I; PU PIO0_6 — General purpose digital input/output pin.
I/O - SCK0 — Serial clock for SPI0.