Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 18 of 547
NXP Semiconductors
UM10398
Chapter 1: LPC111x/LPC11Cxx Introductory information
1.5 ARM Cortex-M0 processor
The ARM Cortex-M0 processor is described in detail in Section 28.3 “About the
Cortex-M0 processor and core peripherals”. For the LPC111x/LPC11Cxx, the ARM
Cortex-M0 processor core is configured as follows:
• System options:
– The Nested Vectored Interrupt Controller (NVIC) is included and supports up to 32
interrupts.
– The system tick timer is included.
• Debug options: Serial Wire Debug is included with two watchpoints and four
breakpoints.