Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 195 of 547
NXP Semiconductors
UM10398
Chapter 12: LPC111x/LPC11Cxx General Purpose I/O (GPIO)
12.4 Functional description
12.4.1 Write/read data operation
In order for software to be able to set GPIO bits without affecting any other pins in a single
write operation, bits [13:2] of a 14-bit wide address bus are used to create a 12-bit wide
mask for write and read operations on the 12 GPIO pins for each port. Only GPIOnDATA
bits masked by 1 are affected by read and write operations. The masked GPIOnDATA
register can be located anywhere between address offsets 0x0000 to 0x3FFC in the
GPIOn address space. Reading and writing to the GPIOnDATA register at address
0x3FFC sets all masking bits to 1.
Write operation
If the address bit (i+2) associated with the GPIO port bit i (i = 0 to 11) to be written is
HIGH, the value of the GPIODATA register bit i is updated. If the address bit (i+2) is LOW,
the corresponding GPIODATA register bit i is left unchanged.
Fig 30. Masked write operation to the GPIODATA register
000000100110
111111100100
uuuuuu1uu10u
1312111098765432
00
ADDRESS[13:2]
address 0x098
data 0xFE4
GPIODATA register
at address + 0x098
u = unchanged