Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 251 of 547
NXP Semiconductors
UM10398
Chapter 15: LPC111x/LPC11Cxx I2C-bus controller
After a Repeated START condition, I
2
C may switch to the master transmitter mode.
15.8.3 Slave Receiver mode
In the slave receiver mode, data bytes are received from a master transmitter. To initialize
the slave receiver mode, write any of the Slave Address registers (ADR0-3) and write the
I
2
C Control Set register (CONSET) as shown in Table 233.
I2EN must be set to 1 to enable the I
2
C function. AA bit must be set to 1 to acknowledge
its own slave address or the General Call address. The STA, STO and SI bits are set to 0.
After ADR and CONSET are initialized, the I
2
C interface waits until it is addressed by its
own address or general address followed by the data direction bit. If the direction bit is 0
(W), it enters slave receiver mode. If the direction bit is 1 (R), it enters slave transmitter
mode. After the address and direction bit have been received, the SI bit is set and a valid
status code can be read from the Status register (STAT). Refer to Table 240
for the status
codes and actions.
Fig 47. Format of Master Receiver mode
Fig 48. A Master Receiver switches to Master Transmitter after sending Repeated START
DATA
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
S SLAVE ADDRESS RW=1 A DATA P
n bytes data received
from Master to Slave
from Slave to Master
A
A
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
SLA = Slave Address
Sr = Repeated START condition
DATA
n bytes data transmitted
From master to slave
From slave to master
A DATA A ASLA R Sr W PS SLA DATAAA
Table 233. I2C0CONSET and I2C1CONSET used to configure Slave mode
Bit 7 6 5 4 3 2 1 0
Symbol - I2EN STA STO SI AA - -
Value- 10001- -