Datasheet
UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 26 of 547
NXP Semiconductors
UM10398
Chapter 3: LPC111x/LPC11Cxx System configuration (SYSCON)
3.5.1 System memory remap register
The system memory remap register selects whether the ARM interrupt vectors are read
from the boot ROM, the flash, or the SRAM. By default, the flash memory is mapped to
address 0x0000 0000. When the MAP bits in the SYSMEMREMAP register are set to 0x0
or 0x1, the boot ROM or RAM respectively are mapped to the bottom 512 bytes of the
memory map (addresses 0x0000 0000 to 0x0000 0200).
3.5.2 Peripheral reset control register
This register allows software to reset the SPI and I2C peripherals. Writing a zero to the
SSP0/1_RST_N or I2C_RST_N bits resets the SPI0/1 or I2C peripheral. Writing a one
de-asserts the reset.
Remark: Before accessing the SPI and I2C peripherals, write a one to this register to
ensure that the reset signals to the SPI and I2C are de-asserted.
STARTRSRP0CLR W 0x208 Start logic reset register 0 n/a Table 39
STARTSRP0 R 0x20C Start logic status register 0 n/a Table 40
- - 0x210 - 0x22C Reserved - -
PDSLEEPCFG R/W 0x230 Power-down states in Deep-sleep mode 0x0000
0000
Table 42
PDAWAKECFG R/W 0x234 Power-down states after wake-up from
Deep-sleep mode
0x0000
EDF0
Table 43
PDRUNCFG R/W 0x238 Power-down configuration register 0x0000
EDF0
Table 44
- - 0x23C - 0x3F0 Reserved - -
DEVICE_ID R 0x3F4 Device ID register 0 for parts LPC1100,
LPC1100C, LPC1100L.
part
dependent
Table 45
Table 7. Register overview: system control block (base address 0x4004 8000) …continued
Name Access Address offset Description Reset
value
Reference
Table 8. System memory remap register (SYSMEMREMAP, address 0x4004 8000) bit
description
Bit Symbol Value Description Reset
value
1:0 MAP System memory remap 10
0x0 Boot Loader Mode. Interrupt vectors are re-mapped to Boot
ROM.
0x1 User RAM Mode. Interrupt vectors are re-mapped to Static
RAM.
0x2 User Flash Mode. Interrupt vectors are not re-mapped and
reside in Flash.
31:2 - - Reserved 0x00