Datasheet

User manual Rev. 12.3 — 10 June 2014 268 of 547

NXP Semiconductors

UM10398

Chapter 15: LPC111x/LPC11Cxx I2C-bus controller

15.10.4 Slave Transmitter mode

In the slave transmitter mode, a number of data bytes are transmitted to a master receiver

(see Figure 57

). Data transfer is initialized as in the slave receiver mode. When ADR and

CON have been initialized, the I

C block waits until it is addressed by its own slave

address followed by the data direction bit which must be “1” (R) for the I

C block to

operate in the slave transmitter mode. After its own slave address and the R bit have been

received, the serial interrupt flag (SI) is set and a valid status code can be read from STAT.

This status code is used to vector to a state service routine, and the appropriate action to

be taken for each of these status codes is detailed in Table 241

. The slave transmitter

mode may also be entered if arbitration is lost while the I

C block is in the master mode

(see state 0xB0).

If the AA bit is reset during a transfer, the I

C block will transmit the last byte of the transfer

and enter state 0xC0 or 0xC8. The I

C block is switched to the not addressed slave mode

and will ignore the master receiver if it continues the transfer. Thus the master receiver

receives all 1s as serial data. While AA is reset, the I

C block does not respond to its own

slave address or a General Call address. However, the I

C-bus is still monitored, and

address recognition may be resumed at any time by setting AA. This means that the AA

bit may be used to temporarily isolate the I

C block from the I

C-bus.