Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 273 of 547
NXP Semiconductors
UM10398
Chapter 15: LPC111x/LPC11Cxx I2C-bus controller
15.10.6.4 I
2
C-bus obstructed by a LOW level on SCL or SDA
An I
2
C-bus hang-up can occur if either the SDA or SCL line is held LOW by any device on
the bus. If the SCL line is obstructed (pulled LOW) by a device on the bus, no further serial
transfer is possible, and the problem must be resolved by the device that is pulling the
SCL bus line LOW.
Typically, the SDA line may be obstructed by another device on the bus that has become
out of synchronization with the current bus master by either missing a clock, or by sensing
a noise pulse as a clock. In this case, the problem can be solved by transmitting additional
clock pulses on the SCL line (see Figure 60
). The I
2
C interface does not include a
dedicated time-out timer to detect an obstructed bus, but this can be implemented using
another timer in the system. When detected, software can force clocks (up to 9 may be
required) on SCL until SDA is released by the offending device. At that point, the slave
may still be out of synchronization, so a START should be generated to insure that all I
2
C
peripherals are synchronized.
15.10.6.5 Bus error
A bus error occurs when a START or STOP condition is detected at an illegal position in
the format frame. Examples of illegal positions are during the serial transfer of an address
byte, a data bit, or an acknowledge bit.
The I
2
C hardware only reacts to a bus error when it is involved in a serial transfer either as
a master or an addressed slave. When a bus error is detected, the I
2
C block immediately
switches to the not addressed slave mode, releases the SDA and SCL lines, sets the
interrupt flag, and loads the status register with 0x00. This status code may be used to
vector to a state service routine which either attempts the aborted serial transfer again or
simply recovers from the error condition as shown in Table 242
.
15.10.7 I
2
C state service routines
This section provides examples of operations that must be performed by various I
2
C state
service routines. This includes:
• Initialization of the I
2
C block after a Reset.
• I
2
C Interrupt Service
• The 26 state service routines providing support for all four I
2
C operating modes.
(1) Unsuccessful attempt to send a START condition.
(2) SDA line is released.
(3) Successful attempt to send a START condition. State 08H is entered.
Fig 60. Recovering from a bus obstruction caused by a LOW level on SDA
SDA line
SCL line
(1)
(2)
(1)
(3)
STA flag
start
condition