Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 296 of 547
NXP Semiconductors
UM10398
Chapter 16: LPC111x/LPC11Cxx C_CAN controller
16.6.2.4 IF1 and IF2 message buffer registers
The bits of the Message Buffer registers mirror the Message Objects in the Message
RAM.
2 NEWDAT Access new data bit 0 R/W
0 Unchanged. NEWDAT bit remains
unchanged.
Remark: A read access to a message object
can be combined with the reset of the control
bits INTPND and NEWDAT in IF1/2_MCTRL.
The values of these bits transferred to the IFx
Message Control Register always reflect the
status before resetting these bits.
1 Clear. Clear NEWDAT bit in the message
object.
3 CLRINTPND Clear interrupt pending bit. 0 R/W
0 Unchanged. INTPND bit remains unchanged.
1 Clear. Clear INTPND bit in the message
object.
4 CTRL Access control bits 0 R/W
0 Unchanged. Control bits unchanged.
1 Transfer. Transfer control bits to IFx message
buffer.
5 ARB Access arbitration bits 0 R/W
0 Unchanged. Arbitration bits unchanged.
1 Transfer. Transfer Identifier, DIR, XTD, and
MSGVAL bits to IFx message buffer register.
6 MASK Access mask bits 0 R/W
0 Unchanged. Mask bits unchanged.
1 Transfer. Transfer Identifier MSK + MDIR +
MXTD to IFx message buffer register.
7 WR_RD 0 Read transfer
Transfer data from the message object
addressed by the command request register
to the selected message buffer registers
CANIFn_CMDREQ.
0R/W
31:8 - - reserved 0 -
Table 257. CAN message interface command mask registers (CANIF1_CMDMSK_R, address
0x4005 0024 and CANIF2_CMDMSK_R, address 0x4005 0084) bit description for
read direction
…continued
Bit Symbol Value Description Reset
value
Access