Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 446 of 547
NXP Semiconductors
UM10398
Chapter 26: LPC111x/LPC11Cxx Flash programming firmware
26.9 Flash memory access
Depending on the system clock frequency, access to the flash memory can be configured
with various access times by writing to the FLASHCFG register at address 0x4003 C010.
Remark: Improper setting of this register may result in incorrect operation of the
LPC111x/LPC11Cxx flash memory. Do not manipulate the FLASHCFG register when
using power profiles (set_power() and/or set_pll() API’s).
Table 408. Flash configuration register (FLASHCFG, address 0x4003 C010) bit description
Bit Symbol Value Description Reset
value
1:0 FLASHTIM Flash memory access time. FLASHTIM +1 is equal to the
number of system clocks used for flash access.
10
0x0 1 system clock flash access time (for system clock
frequencies of up to 20 MHz).
0x1 2 system clocks flash access time (for system clock
frequencies of up to 40 MHz).
0x2 3 system clocks flash access time (for system clock
frequencies of up to 50 MHz).
0x3 Reserved.
31:2 - - Reserved. User software must not change the value of
these bits. Bits 31:2 must be written back exactly as read.
-