Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 452 of 547
NXP Semiconductors
UM10398
Chapter 27: LPC111x/LPC11Cxx Serial Wire Debug (SWD)
27.6 Debug notes
27.6.1 Debug limitations
Important: The user should be aware of certain limitations during debugging. The most
important is that, due to limitations of the ARM Cortex-M0 integration, the
LPC111x/LPC11Cxx cannot wake up in the usual manner from Deep-sleep mode. It is
recommended not to use this mode during debug.
Another issue is that debug mode changes the way in which reduced power modes work
internal to the ARM Cortex-M0 CPU, and this ripples through the entire system. These
differences mean that power measurements should not be made while debugging, the
results will be higher than during normal operation in an application.
During a debugging session, the System Tick Timer is automatically stopped whenever
the CPU is stopped. Other peripherals are not affected.
27.6.2 Debug connections
For debugging purposes, it is useful to provide access to the ISP entry pin PIO0_1. This
pin can be used to recover the part from configurations which would disable the SWD port
such as improper PLL configuration, reconfiguration of SWD pins as ADC inputs, entry
into Deep power-down mode out of reset, etc. This pin can be used for other functions
such as GPIO, but it should not be held low on power-up or reset.
The VTREF pin on the SWD connector enables the debug connector to match the target voltage.
Fig 94. Connecting the SWD pins to a standard SWD connector
RESET
Signals from SWD connector
SWDIO
SWCLK
VDD
Gnd
VTREF
SWDIO
SWCLK
nSRST
GND
LPC111x
ISP entry
PIO0_1