Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 468 of 547
NXP Semiconductors
UM10398
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
The vector table is fixed at address 0x00000000 .
28.4.3.5 Exception priorities
As Table 28–428 shows, all exceptions have an associated priority, with:
• a lower priority value indicating a higher priority
• configurable priorities for all exceptions except Reset, HardFault, and NMI.
If software does not configure any priorities, then all exceptions with a configurable priority
have a priority of 0. For information about configuring exception priorities see
• Section 28–28.6.3.7
• Section 28–28.6.2.6.
Remark: Configurable priority values are in the range 0-3. The Reset, HardFault, and NMI
exceptions, with fixed negative priority values, always have higher priority than any other
exception.
Fig 101. Vector table
,QLWLDO63YDOXH
5HVHW
+DUG)DXOW
10,
[
[
[
[&
[
5HVHUYHG
69&DOO
3HQG69
6\V7LFN
,54
5HVHUYHG
[&
[
[&
[
2IIVHW([FHSWLRQQXPEHU















9HFWRU





,54
,54
[
,54

[







[%&
,54QXPEHU








