Datasheet

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User manual Rev. 12.3 — 10 June 2014 471 of 547
NXP Semiconductors
UM10398
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
not a normal branch operation and, instead, that the exception is complete. Therefore, it
starts the exception return sequence. Bits[3:0] of the EXC_RETURN value indicate the
required return stack and processor mode, as Table 28–429
shows.
28.4.4 Fault handling
Faults are a subset of exceptions, see Section 28–28.4.3. All faults result in the HardFault
exception being taken or cause lockup if they occur in the NMI or HardFault handler. The
faults are:
• execution of an SVC instruction at a priority equal or higher than SVCall
• execution of a BKPT instruction without a debugger attached
• a system-generated bus error on a load or store
• execution of an instruction from an XN memory address
• execution of an instruction from a location for which the system generates a bus fault
• a system-generated bus error on a vector fetch
• execution of an Undefined instruction
• execution of an instruction when not in Thumb-State as a result of the T-bit being
previously cleared to 0
• an attempted load or store to an unaligned address.
Remark: Only Reset and NMI can preempt the fixed priority HardFault handler. A
HardFault can preempt any exception other than Reset, NMI, or another hard fault.
28.4.4.1 Lockup
The processor enters a lockup state if a fault occurs when executing the NMI or HardFault
handlers, or if the system generates a bus error when unstacking the PSR on an
exception return using the MSP. When the processor is in lockup state it does not execute
any instructions. The processor remains in lockup state until one of the following occurs:
• it is reset
• a debugger halts it
• an NMI occurs and the current lockup is in the HardFault handler.
Table 429. Exception return behavior
EXC_RETURN Description
0xFFFFFFF1 Return to Handler mode.
Exception return gets state from the main stack.
Execution uses MSP after return.
0xFFFFFFF9 Return to Thread mode.
Exception return gets state from MSP.
Execution uses MSP after return.
0xFFFFFFFD Return to Thread mode.
Exception return gets state from PSP.
Execution uses PSP after return.
All other values Reserved.