Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 499 of 547
NXP Semiconductors
UM10398
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
28.5.7.1 BKPT
Breakpoint.
28.5.7.1.1 Syntax
BKPT #imm
where:
imm is an integer in the range 0-255.
28.5.7.1.2 Operation
The BKPT instruction causes the processor to enter Debug state. Debug tools can use
this to investigate system state when the instruction at a particular address is reached.
imm is ignored by the processor. If required, a debugger can use it to store additional
information about the breakpoint.
The processor might also produce a HardFault or go in to lockup if a debugger is not
attached when a BKPT instruction is executed. See Section 28–28.4.4.1
for more
information.
28.5.7.1.3 Restrictions
There are no restrictions.
28.5.7.1.4 Condition flags
This instruction does not change the flags.
28.5.7.1.5 Examples
BKPT #0 ; Breakpoint with immediate value set to 0x0.
28.5.7.2 CPS
Change Processor State.
28.5.7.2.1 Syntax
CPSID i
CPSIE i
28.5.7.2.2 Operation
CPS changes the PRIMASK special register values. CPSID causes interrupts to be
disabled by setting PRIMASK. CPSIE cause interrupts to be enabled by clearing
PRIMASK.See Section 28–28.4.1.3.6
for more information about these registers.
SVC Supervisor Call Section 28–28.5.7.
10
WFE Wait For Event Section 28–28.5.7.
11
WFI Wait For Interrupt Section 28–28.5.7.
12
Table 439. Miscellaneous instructions
Mnemonic Brief description See