Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 526 of 547
NXP Semiconductors
UM10398
Chapter 29: Supplementary information
(IOCON_RESET_PIO0_0, address 0x4004
400C) bit description. . . . . . . . . . . . . . . . . . . .112
Table 109. IOCON_PIO0_1 register (IOCON_PIO0_1,
address 0x4004 4010) bit description . . . . . .113
Table 110. IOCON_PIO1_8 register (IOCON_PIO1_8,
address 0x4004 4014) bit description . . . . . .114
Table 111. IOCON_PIO0_2 register (IOCON_PIO0_2,
address 0x4004 401C) bit description . . . . . . 114
Table 112. IOCON_PIO2_7 register (IOCON_PIO2_7,
address 0x4004 4020) bit description . . . . . .115
Table 113. IOCON_PIO2_8 register (IOCON_PIO2_8,
address 0x4004 4024) bit description . . . . . .115
Table 114. IOCON_PIO2_1 register (IOCON_PIO2_1,
address 0x4004 4028) bit description . . . . . .116
Table 115. IOCON_PIO0_3 register (IOCON_PIO0_3,
address 0x4004 402C) bit description . . . . . . 117
Table 116. IOCON_PIO0_4 register (IOCON_PIO0_4,
address 0x4004 4030) bit description . . . . . .117
Table 117. IOCON_PIO0_5 register (IOCON_PIO0_5,
address 0x4004 4034) bit description . . . . . .118
Table 118. IOCON_PIO1_9 register (IOCON_PIO1_9,
address 0x4004 4038) bit description . . . . . .118
Table 119. IOCON_PIO3_4 register (IOCON_PIO3_4,
address 0x4004 403C) bit description . . . . . . 119
Table 120. IOCON_PIO2_4 register (IOCON_PIO2_4,
address 0x4004 4040) bit description . . . . . .119
Table 121. IOCON_PIO2_5 register (IOCON_PIO2_5,
address 0x4004 4044) bit description . . . . . .120
Table 122. IOCON_PIO3_5 register (IOCON_PIO3_5,
address 0x4004 4048) bit description . . . . . .120
Table 123. IOCON_PIO0_6 register (IOCON_PIO0_6,
address 0x4004 404C) bit description . . . . . .121
Table 124. IOCON_PIO0_7 register (IOCON_PIO0_7,
address 0x4004 4050) bit description. . . . . . .122
Table 125. IOCON_PIO2_9 register (IOCON_PIO2_9,
address 0x4004 4054) bit description . . . . . .122
Table 126. IOCON_PIO2_10 register (IOCON_PIO2_10,
address 0x4004 4058) bit description . . . . . .123
Table 127. IOCON_PIO2_2 register (IOCON_PIO2_2,
address 0x4004 405C) bit description . . . . . .123
Table 128. IOCON_PIO0_8 register (IOCON_PIO0_8,
address 0x4004 4060) bit description . . . . . .124
Table 129. IOCON_PIO0_9 register (IOCON_PIO0_9,
address 0x4004 4064) bit description . . . . . .124
Table 130. IOCON_SWCLK_PIO0_10 register
(IOCON_SWCLK_PIO0_10, address 0x4004
4068) bit description . . . . . . . . . . . . . . . . . . .125
Table 131. IOCON_PIO1_10 register (IOCON_PIO1_10,
address 0x4004 406C) bit description . . . . . .126
Table 132. IOCON_PIO2_11 register (IOCON_PIO2_11,
address 0x4004 4070) bit description . . . . . .126
Table 133. IOCON_R_PIO0_11 register
(IOCON_R_PIO0_11, address 0x4004 4074) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .127
Table 134. IOCON_R_PIO1_0 register (IOCON_R_PIO1_0,
address 0x4004 4078) bit description . . . . . .128
Table 135. IOCON_R_PIO1_1 register (IOCON_R_PIO1_1,
address 0x4004 407C) bit description . . . . . .128
Table 136. IOCON_R_PIO1_2 register (IOCON_R_PIO1_2,
address 0x4004 4080) bit description . . . . . 129
Table 137. IOCON_PIO3_0 register (IOCON_PIO3_0,
address 0x4004 4084) bit description . . . . . . 130
Table 138. IOCON_PIO3_1 register (IOCON_PIO3_1,
address 0x4004 4088) bit description . . . . . . 131
Table 139. IOCON_PIO2_3 register (IOCON_PIO2_3,
address 0x4004 408C) bit description . . . . . 131
Table 140. IOCON_SWDIO_PIO1_3 register
(IOCON_SWDIO_PIO1_3, address 0x4004 4090)
bit description . . . . . . . . . . . . . . . . . . . . . . . . 132
Table 141. IOCON_PIO1_4 register (IOCON_PIO1_4,
address 0x4004 4094) bit description . . . . . . 133
Table 142. IOCON_PIO1_11 register (IOCON_PIO1_11,
address 0x4004 4098) bit description . . . . . 133
Table 143. IOCON_PIO3_2 register (IOCON_PIO3_2,
address 0x4004 409C) bit description . . . . . 134
Table 144. IOCON_PIO1_5 register (IOCON_PIO1_5,
address 0x4004 40A0) bit description . . . . . . 135
Table 145. IOCON_PIO1_6 register (IOCON_PIO1_6,
address 0x4004 40A4) bit description . . . . . . 135
Table 146. IOCON_PIO1_7 register (IOCON_PIO1_7,
address 0x4004 40A8) bit description . . . . . . 136
Table 147. IOCON_PIO3_3 register (IOCON_PIO3_3,
address 0x4004 40AC) bit description . . . . . 136
Table 148. IOCON SCK0 location register
(IOCON_SCK0_LOC, address 0x4004 40B0) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Table 149. IOCON DSR
location register
(IOCON_DSR_LOC, address 0x4004 40B4) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Table 150. IOCON DCD
location register
(IOCON_DCD_LOC, address 0x4004 40B8) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Table 151. IOCON RI
location register (IOCON_RI_LOC,
address 0x4004 40BC) bit description . . . . . 138
Table 152. IOCON SSEL1 location register
(IOCON_SSEL1_LOC, address 0x4004 4018) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Table 153. IOCON CT16B0_CAP0 location register
(IOCON_CT16B0_CAP0_LOC, address 0x4004
40C0) bit description . . . . . . . . . . . . . . . . . . . 139
Table 154. IOCON SCK1 location register
(IOCON_SCK1_LOC, address 0x4004 40C4) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Table 155. IOCON MISO1 location register
(IOCON_MISO1_LOC, address 0x4004 40C8) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Table 156. IOCON MOSI1 location register
(IOCON_MOSI1_LOC, address 0x4004 40CC) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Table 157. IOCON CT32B0_CAP0 location register
(IOCON_CT32B0_CAP0_LOC, address 0x4004
40D0) bit description . . . . . . . . . . . . . . . . . . . 140
Table 158. IOCON RXD location register
(IOCON_RXD_LOC, address 0x4004 40D4) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Table 159. LPC11(D)1x/LPC11Cxx pin configurations . . 142