Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 541 of 547
NXP Semiconductors
UM10398
Chapter 29: Supplementary information
17.4.13 CANopen SDO expedited read callback. . . . 328
17.4.14 CANopen SDO expedited write callback . . . 329
17.4.15 CANopen SDO segmented read callback . . 329
17.4.16 CANopen SDO segmented write callback . . 330
17.4.17 CANopen fall-back SDO handler callback . . 332
Chapter 18: LPC1100/LPC1100C/LPC1100L series: 16-bit counter/timer CT16B0/1
18.1 How to read this chapter. . . . . . . . . . . . . . . . 333
Pin-out variations . . . . . . . . . . . . . . . . . . . . . .333
18.2 Basic configuration . . . . . . . . . . . . . . . . . . . . 333
18.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333
18.4 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 334
18.5 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 334
18.6 Pin description. . . . . . . . . . . . . . . . . . . . . . . . 334
18.7 Register description . . . . . . . . . . . . . . . . . . . 334
18.7.1 Interrupt Register (TMR16B0IR and
TMR16B1IR). . . . . . . . . . . . . . . . . . . . . . . . . 336
18.7.2 Timer Control Register (TMR16B0TCR and
TMR16B1TCR). . . . . . . . . . . . . . . . . . . . . . . 337
18.7.3 Timer Counter (TMR16B0TC - address 0x4000
C008 and TMR16B1TC - address 0x4001
0008) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 337
18.7.4 Prescale Register (TMR16B0PR - address
0x4000 C00C and TMR16B1PR - address
0x4001 000C) . . . . . . . . . . . . . . . . . . . . . . . . 337
18.7.5 Prescale Counter register (TMR16B0PC -
address 0x4000 C010 and TMR16B1PC -
address 0x4001 0010) . . . . . . . . . . . . . . . . . 338
18.7.6 Match Control Register (TMR16B0MCR and
TMR16B1MCR) . . . . . . . . . . . . . . . . . . . . . . 338
18.7.7 Match Registers (TMR16B0MR0/1/2/3 -
addresses 0x4000 C018/1C/20/24 and
TMR16B1MR0/1/2/3 - addresses 0x4001
0018/1C/20/24) . . . . . . . . . . . . . . . . . . . . . . 339
18.7.8 Capture Control Register (TMR16B0CCR and
TMR16B1CCR) . . . . . . . . . . . . . . . . . . . . . . 340
18.7.9 Capture Register (CT16B0CR0 - address 0x4000
C02C and CT16B1CR0 - address 0x4001
002C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 340
18.7.10 External Match Register (TMR16B0EMR and
TMR16B1EMR) . . . . . . . . . . . . . . . . . . . . . . 341
18.7.11 Count Control Register (TMR16B0CTCR and
TMR16B1CTCR) . . . . . . . . . . . . . . . . . . . . . 342
18.7.12 PWM Control register (TMR16B0PWMC and
TMR16B1PWMC) . . . . . . . . . . . . . . . . . . . . 343
18.7.13 Rules for single edge controlled PWM
outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344
18.8 Example timer operation . . . . . . . . . . . . . . . 345
18.9 Architecture. . . . . . . . . . . . . . . . . . . . . . . . . . 346
Chapter 19: LPC1100XL series: 16-bit counter/timer CT16B0/1
19.1 How to read this chapter. . . . . . . . . . . . . . . . 347
19.2 Basic configuration . . . . . . . . . . . . . . . . . . . . 347
19.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 347
19.4 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 348
19.5 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 348
19.6 Pin description. . . . . . . . . . . . . . . . . . . . . . . . 348
19.7 Register description . . . . . . . . . . . . . . . . . . . 348
19.7.1 Interrupt Register (TMR16B0IR and
TMR16B1IR). . . . . . . . . . . . . . . . . . . . . . . . . 351
19.7.2 Timer Control Register (TMR16B0TCR and
TMR16B1TCR). . . . . . . . . . . . . . . . . . . . . . . 351
19.7.3 Timer Counter (TMR16B0TC - address 0x4000
C008 and TMR16B1TC - address 0x4001
0008) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
19.7.4 Prescale Register (TMR16B0PR - address
0x4000 C00C and TMR16B1PR - address
0x4001 000C) . . . . . . . . . . . . . . . . . . . . . . . . 352
19.7.5 Prescale Counter register (TMR16B0PC -
address 0x4000 C010 and TMR16B1PC -
address 0x4001 0010) . . . . . . . . . . . . . . . . . 352
19.7.6 Match Control Register (TMR16B0MCR and
TMR16B1MCR) . . . . . . . . . . . . . . . . . . . . . . 352
19.7.7 Match Registers (TMR16B0MR0/1/2/3 -
addresses 0x4000 C018/1C/20/24 and
TMR16B1MR0/1/2/3 - addresses 0x4001
0018/1C/20/24) . . . . . . . . . . . . . . . . . . . . . . 353
19.7.8 Capture Control Register (TMR16B0CCR and
TMR16B1CCR) . . . . . . . . . . . . . . . . . . . . . . 354
19.7.9 Capture Register (CT16B0CR0/1 - address
0x4000 C02C/30 and CT16B1CR0/1 - address
0x4001 002C/30) . . . . . . . . . . . . . . . . . . . . . 355
19.7.10 External Match Register (TMR16B0EMR and
TMR16B1EMR) . . . . . . . . . . . . . . . . . . . . . . 355
19.7.11 Count Control Register (TMR16B0CTCR and
TMR16B1CTCR) . . . . . . . . . . . . . . . . . . . . . 357
19.7.12 PWM Control register (TMR16B0PWMC and
TMR16B1PWMC) . . . . . . . . . . . . . . . . . . . . 358
19.7.13 Rules for single edge controlled PWM
outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 359
19.8 Example timer operation . . . . . . . . . . . . . . . 360
19.9 Architecture. . . . . . . . . . . . . . . . . . . . . . . . . . 360
Chapter 20: LPC1100/LPC1100C/LPC1100L series: 32-bit counter/timer CT32B0/1
20.1 How to read this chapter. . . . . . . . . . . . . . . . 362
20.2 Basic configuration . . . . . . . . . . . . . . . . . . . . 362
20.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 362
20.4 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . 362
20.5 Description . . . . . . . . . . . . . . . . . . . . . . . . . . 363
20.6 Pin description . . . . . . . . . . . . . . . . . . . . . . . 363