Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 55 of 547
NXP Semiconductors
UM10398
Chapter 3: LPC111x/LPC11Cxx System configuration (SYSCON)
1. Specify the input clock frequency FCLKIN.
2. Calculate M to obtain the desired output frequency FCLKOUT with
M = FCLKOUT / FCLKIN.
3. Find a value so that FCCO = 2 P FCLKOUT.
4. Verify that all frequencies and divider values conform to the limits specified in
Table 10
.
5. Ensure that FCLKOUT < 100 MHz.
Table 47
shows how to configure the PLL for a 12 MHz crystal oscillator using the
SYSPLLCTRL register (Table 10
). The main clock is equivalent to the system clock if the
system clock divider SYSAHBCLKDIV is set to one (see Table 20
).
3.11.4.2 Power-down mode
In this mode, the internal current reference is turned off, the oscillator and the
phase-frequency detector are stopped, and the dividers enter a reset state. While in
Power-down mode, the lock output is be LOW to indicate that the PLL is not in lock. When
the Power-down mode is terminated by setting the SYSPLL_PD bit to zero in the
Power-down configuration register (Table 44
), the PLL resumes its normal operation and
asserts the lock signal HIGH once it has regained lock on the input clock.
3.12 Flash memory access
Depending on the system clock frequency, access to the flash memory can be configured
with various access times by writing to the FLASHCFG register at address 0x4003 C010.
This register is part of the flash configuration block (see Figure 6
).
Remark: Improper setting of this register may result in incorrect operation of the
LPC111x/LPC11Cxx flash memory. Do not manipulate the FLASHCFG register when
using power profiles (set_power() and/or set_pll() API’s).
Table 47. PLL configuration examples
PLL input
clock
sys_pllclkin
(FCLKIN)
Main clock
(FCLKOUT)
MSEL bits
Table 10
M divider
value
PSEL bits
Table 10
P divider
value
FCCO
frequency
12 MHz 48 MHz 00011 4 01 2 192 MHz
12 MHz 36 MHz 00010 3 10 4 288 MHz
12 MHz 24 MHz 00001 2 10 4 192 MHz