Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 7 of 547
NXP Semiconductors
UM10398
Chapter 1: LPC111x/LPC11Cxx Introductory information
– Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
– PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator or the internal RC
oscillator.
– Clock output function with divider that can reflect the system oscillator clock, IRC
clock, CPU clock, and the Watchdog clock.
• Power control:
– Integrated PMU (Power Management Unit) to minimize power consumption during
Sleep, Deep-sleep, and Deep power-down modes.
– Power profiles residing in boot ROM allowing to optimize performance and
minimize power consumption for any given application through one simple function
call. (On LPC1100L and LPC1100XL parts only).
– Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
– Processor wake-up from Deep-sleep mode via a dedicated start logic using up to
13 of the functional pins.
– Power-On Reset (POR).
– Brownout detect with up to four separate thresholds for interrupt and forced reset.
• Unique device serial number for identification.
• Single 3.3 V power supply (1.8 V to 3.6 V).
• Available as LQFP48 package, HVQFN33 package.
• LPC1100L series also available as HVQFN24, TSSOP28 package, DIP28 package,
TSSOP20 package, and SO20 package.
• Available as dual-chip module consisting of the LPC1114 single-chip microcontroller
combined with a PCF8576D Universal LCD driver in a 100-pin LQFP package (part
LPC11D14FBD100/302).
1
1. For details on the PCF8576D operation, see Ref. 3.