Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 71 of 547
7.1 How to read this chapter
Remark: This chapter applies to parts in the following series (see Table 1):
• LPC1100
• LPC1100L
• LPC1100C
• LPC11D14
Pin configuration
The implementation of the I/O configuration registers varies for different
LPC111x/LPC11Cxx parts and packages. Table 57
shows which IOCON registers are
used on the different packages.
C_CAN pins
• For the LPC11C12/C14, functions PIO3_4 and PIO3_5 are not available. Instead, two
pins are dedicated to the C_CAN receive and transmit functions (see Table 57
)
without pull-up or pull-down resistors. The C_CAN pins have no programmable pin
configuration.
• For the LPC11C22/C24, pins PIO1_9, PIO2_4, PIO2_5, and PIO2_9 are not available
and are replaced by the on-chip CAN transceiver pins. The CAN transceiver pins
have no programmable pin configuration.
Pseudo open-drain function
For the LPC11(D)1x/102/202/302, a pseudo open-drain mode can be selected in the
IOCON registers for each digital pin except the I2C pins (see Figure 14
). The open-drain
mode is not available for the LPC111x/101/201/301 parts.
Pull-up level
If the pull-up resistor is enabled (default), all non-I2C pins are pulled up to 2.6 V for
LPC111x/101/201/301 parts and pulled up to 3.3 V for LPC11Cxx parts and
LPC111x/102/202/302 (V
DD
= 3.3 V).
7.2 Features
The I/O configuration registers control the electrical characteristics of the pads. The
following features are programmable:
• Pin function.
• Internal pull-up/pull-down resistor or bus keeper function.
• Hysteresis.
• Analog input or digital mode for pads hosting the ADC inputs.
• I
2
C mode for pads hosting the I
2
C-bus function.
UM10398
Chapter 7: LPC1100/LPC1100C/LPC1100L series: I/O
configuration (IOCONFIG)
Rev. 12.3 — 10 June 2014 User manual