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DOCUMENT NUMBER

9S12DT128BDGV1/D

MC9S12DT128B

Device User Guide

V01.09

Covers also

MC9S12DG128B, MC9S12DJ128B,

MC9S12DB128B

Original Release Date: 18 June 2001

Revised: 31 October 2002

Freescale Semiconductor, I

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

Summary of content (128 pages)

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Freescale Semiconductor, Inc. DOCUMENT NUMBER 9S12DT128BDGV1/D MC9S12DT128B Device User Guide V01.09 Freescale Semiconductor, Inc... Covers also MC9S12DG128B, MC9S12DJ128B, MC9S12DB128B Original Release Date: 18 June 2001 Revised: 31 October 2002 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Revision History Freescale Semiconductor, Inc... Version Revision Effective Number Date Date Author Description of Changes V01.00 18 Jun 2001 18 June 2001 Initial version (parent doc v2.03 dug for dp256). V01.01 23 July 2001 23 July 2001 Updated version after review V01.02 23 Sep 2001 23 Sep 2001 Changed Partname, added pierce mode, updated electrical characteristics some minor corrections V01.
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Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table of Contents Freescale Semiconductor, Inc... Section 1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 1.1 1.2 1.3 1.4 1.5 1.5.1 1.6 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 2.3.21 2.3.22 2.3.23 2.3.24 2.3.25 2.3.26 2.3.27 2.3.28 2.3.29 2.3.30 2.3.31 2.3.32 2.3.33 2.3.34 2.3.35 2.3.36 2.3.37 2.3.38 2.3.39 2.3.40 2.3.41 2.3.42 2.3.43 2.3.44 2.3.45 2.3.46 2.3.47 2.3.48 2.3.49 2.3.50 2.3.51 2.3.52 2.3.53 2.3.54 2.3.55 2.3.56 PH6 / KWH6 — Port H I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 PH5 / KWH5 — Port H I/O Pin 5 . . . . . .
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Freescale Semiconductor, Inc... 2.3.57 PT[7:0] / IOC[7:0] — Port T I/O Pins [7:0] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63 2.4 Power Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63 2.4.1 VDDX,VSSX — Power & Ground Pins for I/O Drivers . . . . . . . . . . . . . . . . . . . . . . . .64 2.4.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Section 7 Clock and Reset Generator (CRG) Block Description . . . . . . . . . 77 7.1 Device-specific information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77 7.1.1 XCLKS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77 Section 8 Enhanced Capture Timer (ECT) Block Description . . . . . . . . . . . .
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Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.1.3 Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86 A.1.4 Current Injection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86 A.1.5 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 A.1.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Freescale Semiconductor, Inc... List of Figures Figure 0-1 Order Partnumber Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Figure 1-1 MC9S12DT128B Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Figure 1-2 MC9S12DT128B Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Freescale Semiconductor, Inc... List of Tables Table 0-1 Derivative Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Table 0-2 Document References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Table 1-1 Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 $01C0 - $01FF Reserved ..................................................................................................41 $0200 - $023F Reserved ..................................................................................................41 $0240 - $027F PIM (Port Integration Module) ..................................................................
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Derivative Differences and Document References Derivative Differences Table 0-1 shows the availability of peripheral modules on the various derivatives. For details about the compatibility within the MC9S12D-Family refer also to engineering bulletin EB386. Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Freescale Semiconductor, Inc... • • • – Do not write or read BDLC registers (after reset: address range $00E8 - $00EF), if using a derivative without BDLC (see Table 0-1). – Do not write or read IIC registers (after reset: address range $00E0 - $00E7), if using a derivative without IIC (see Table 0-1).
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Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 – Port M[7:6] PM7:6 must be configured as outputs or their pull resistors must be enabled to avoid floating inputs. – Port P6 PP6 must be configured as output or its pull resistor must be enabled to avoid a floating input. – Port S[7:4] PS7:4 must be configured as outputs or their pull resistors must be enabled to avoid floating inputs.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Section 1 Introduction Freescale Semiconductor, Inc... 1.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 • Freescale Semiconductor, Inc... • • • • • • – Digital filtering – Programmable rising or falling edge trigger Memory – 128K Flash EEPROM – 2K byte EEPROM – 8K byte RAM Two 8-channel Analog-to-Digital Converters – 10-bit resolution – External conversion trigger capability Three 1M bit per second, CAN 2.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 • SAE J1850 Class B Data Communications Network Interface – • Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 1.4 Block Diagram Freescale Semiconductor, Inc... Figure 1-1 shows a block diagram of the MC9S12DT128B device. For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Figure 1-1 MC9S12DT128B Block Diagram Internal Logic 2.5V VDD1,2 VSS1,2 PLL 2.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 1.5 Device Memory Map Table 1-1 and Figure 1-2 show the device memory map of the MC9S12DT128B after reset. Note that after reset the EEPROM ($0000 – $07FF) is hidden by the register space ($0000 - $03FF) and the RAM ($0000 - $1FFF). The bottom 1K Bytes of RAM ($0000 - $03FF) are hidden by the register space. Table 1-1 Device Memory Map Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table 1-1 Device Memory Map Address Size (Bytes) Module Fixed Flash EEPROM array $C000 – $FFFF incl. 0.5K, 1K, 2K or 4K Protected Sector at end and 256 bytes of Vector Space at $FF80 – $FFFF 16384 Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 1.5.1 Detailed Register Map $0000 - $000F Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0015 - $0016 Address INT map 1 of 2 (Core User Guide) Name $0015 ITCR $0016 ITEST Read: Write: Read: Write: $0017 - $0017 Address Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0020 - $0027 Address $0020 $0027 Reserved Name Reserved Read: Write: $0028 - $002F Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0040 - $007F Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0040 - $007F Address Name $007C TC2H (hi) $007D TC2H (lo) $007E TC3H (hi) $007F TC3H (lo) Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0080 - $009F Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $00A0 - $00C7 Address $00A9 $00AA $00AB $00AC $00AD Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $00A0 - $00C7 Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $00D0 - $00D7 Address SCI1 (Asynchronous Serial Interface) Name $00D5 SCI1SR2 $00D6 SCI1DRH $00D7 SCI1DRL Read: Write: Read: Write: Read: Write: $00D8 - $00DF Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $00E8 - $00EF Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0100 - $010F Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0110 - $011B Address EEPROM Control Register (eets2k) Name $0119 EADDRLO $011A EDATAHI $011B EDATALO Read: Write: Read: Write: Read: Write: Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0120 - $013F Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0140 - $017F Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table 1-2 Detailed MSCAN Foreground Receive and Transmit Buffer Layout Address $xxxC CANRxDLR $xxxD Reserved $xxxE CANxRTSRH $xxxF CANxRTSRL $xx10 Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0180 - $01BF Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0240 - $027F Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0240 - $027F Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0280 - $02BF Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $02C0 - $02FF Address $02C0 $02FF Reserved Name Reserved Read: Write: $0300 - $035F Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0300 - $035F Address $0315 $0316 $0317 $0318 $0319 Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0360 - $03FF Address $0360 $03FF Reserved Name Reserved Bit 7 0 Read: Write: Bit 6 0 Bit 5 0 Bit 4 0 Bit 3 0 Bit 2 0 Bit 1 0 Bit 0 0 1.6 Part ID Assignments Freescale Semiconductor, Inc... The part ID is located in two 8-bit registers PARTIDH and PARTIDL (addresses $001A and $001B after reset). The read-only value is a unique part ID for each revision of the chip. Table 1-3 shows the assigned part ID number.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Section 2 Signal Description This section describes signals that connect off-chip. It includes a pinout diagram, a table of signal properties, and detailed discussion of signals. It is built from the signal description sections of the Block User Guides of the individual IP blocks on the device. 2.1 Device Pinout Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc.
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80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 MC9S12DG128B, MC9S12DJ128B 80 QFP 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 VRH VDDA PAD07/AN07/ETRIG0 PAD06/AN06 PAD05/AN05 PAD04/AN04 PAD03/AN03 PAD02/AN02 PAD01/AN01 PAD00/AN00 VSS2 VDD2 PA7/ADDR15/DATA15 PA6/ADDR14/DATA14 PA5/ADDR13/DATA13 PA4/ADDR12/DATA12 PA3/ADDR11/DATA11 PA2/ADDR10/DATA10 PA1/ADDR9/DATA9 PA0/ADDR8/DATA8 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.2 Signal Properties Summary Table 2-1 summarizes the pin functionality. Signals shown in bold are not available in the 80 pin package. Table 2-1 Signal Properties Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3 Detailed Signal Descriptions 2.3.1 EXTAL, XTAL — Oscillator Pins EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived from the EXTAL input frequency. XTAL is the crystal output. Freescale Semiconductor, Inc... 2.3.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.6 PAD[15] / AN1[7] / ETRIG1 — Port AD Input Pin [15] PAD15 is a general purpose input pin and analog input of the analog to digital converter ATD1. It can act as an external trigger input for the ATD1. 2.3.7 PAD[14:8] / AN1[6:0] — Port AD Input Pins [14:8] PAD14 - PAD8 are general purpose input pins and analog inputs of the analog to digital converter ATD1. 2.3.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 EXTAL CDC * C1 MCU Crystal or ceramic resonator XTAL C2 Freescale Semiconductor, Inc... VSSPLL * Due to the nature of a translated ground Colpitts oscillator a DC voltage bias is applied to the crystal Please contact the crystal manufacturer for crystal DC bias conditions and recommended capacitor value CDC.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.13 PE6 / MODB / IPIPE1 — Port E I/O Pin 6 PE6 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset. The state of this pin is latched to the MODB bit at the rising edge of RESET. This pin is shared with the instruction queue tracking signal IPIPE1. This pin is an input with a pull-down device which is only active when RESET is low. 2.3.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.21 PH6 / KWH6 — Port H I/O Pin 6 PH6 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. 2.3.22 PH5 / KWH5 — Port H I/O Pin 5 PH5 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. Freescale Semiconductor, Inc... 2.3.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.29 PJ6 / KWJ6 / RXCAN4 / SDA — PORT J I/O Pin 6 PJ6 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. It can be configured as the receive pin RXCAN for the Motorola Scalable Controller Area Network controller 4 (CAN4) or the serial data pin SDA of the IIC module. 2.3.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.36 PM4 / BF_PSYN / RXCAN0 / RXCAN4/ MOSI0 — Port M I/O Pin 4 PM4 is a general purpose input or output pin. It can be configured as the correct synchronisation pulse reception/transmission output pulse pin of Byteflight. It can be configured as the receive pin RXCAN of the Motorola Scalable Controller Area Network controllers 0 or 4 (CAN0 or CAN4).
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.43 PP5 / KWP5 / PWM5 — Port P I/O Pin 5 PP5 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 5 output. 2.3.44 PP4 / KWP4 / PWM4 — Port P I/O Pin 4 PP4 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.51 PS5 / MOSI0 — Port S I/O Pin 5 PS5 is a general purpose input or output pin. It can be configured as master output (during master mode) or slave input pin (during slave mode) MOSI of the Serial Peripheral Interface 0 (SPI0). 2.3.52 PS4 / MISO0 — Port S I/O Pin 4 PS4 is a general purpose input or output pin.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Freescale Semiconductor, Inc... Pin Number 112-pin QFP Nominal Voltage VDDR 41 5.0V VSSR 40 0V VDDX 107 5.0V VSSX 106 0V VDDA 83 5.0V VSSA 86 0V VRL 85 0V VRH 84 5.0V VDDPLL 43 2.5V VSSPLL 45 0V VREGEN 97 5V Mnemonic NOTE: Description External power and ground, supply to pin drivers and internal voltage regulator. External power and ground, supply to pin drivers.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.4.4 VDDA, VSSA — Power Supply Pins for ATD and VREG VDDA, VSSA are the power supply and ground input pins for the voltage regulator and the analog to digital converter. It also provides the reference for the internal voltage regulator. This allows the supply voltage to the ATD and the reference voltage to be bypassed independently. 2.4.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Section 3 System Clock Description 3.1 Overview The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules. Figure 3-1 shows the clock connections from the CRG to all modules. Consult the CRG Block User Guide for details on clock generation. Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Section 4 Modes of Operation 4.1 Overview Eight possible modes determine the operating configuration of the MC9S12DT128B. Each mode has an associated default memory map and external bus configuration controlled by a further pin. Three low power modes exist for the device. Freescale Semiconductor, Inc... 4.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table 4-3 Voltage Regulator VREGEN VREGEN Description 1 Internal Voltage Regulator enabled 0 Internal Voltage Regulator disabled, VDD1,2 and VDDPLL must be supplied externally with 2.5V 4.3 Security Freescale Semiconductor, Inc... The device will make available a security feature preventing the unauthorized read and write of the memory contents.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 4.3.3 Unsecuring the Microcontroller In order to unsecure the microcontroller, the internal FLASH and EEPROM must be erased. This can be done through an external program in expanded mode. Freescale Semiconductor, Inc... Once the user has erased the FLASH and EEPROM, the part can be reset into special single chip mode. This invokes a program that verifies the erasure of the internal FLASH and EEPROM.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Section 5 Resets and Interrupts 5.1 Overview Consult the Exception Processing section of the HCS12 Core User Guide for information on resets and interrupts. 5.2 Vectors Freescale Semiconductor, Inc... 5.2.1 Vector Table Table 5-1 lists interrupt sources and vectors in default order of priority.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 NOTE: For devices assembled in 80-pin QFP packages all non-bonded out pins should be configured as outputs after reset in order to avoid current drawn from floating inputs. Refer to Table 2-1 for affected pins. 5.3.2 Memory Refer to Table 1-1 for locations of the memories depending on the operating mode after reset. Freescale Semiconductor, Inc... The RAM array is not automatically initialized out of reset.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Section 6 HCS12 Core Block Description Consult the HCS12 Core User Guide for information about the HCS12 core modules, i.e. central processing unit (CPU), interrupt module (INT), module mapping control module (MMC), multiplexed external bus interface (MEBI), breakpoint module (BKP) and background debug mode module (BDM). 6.1 Device-specific information Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Consult the IIC Block User Guide for information about the Inter-IC Bus module. Section 11 Serial Communications Interface (SCI) Block Description Freescale Semiconductor, Inc... There are two Serial Communications Interfaces (SCI1 and SCI0) implemented on theMC9S12DT128B device. Consult the SCI Block User Guide for information about each Serial Communications Interface module.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Consult the EETS2K Block User Guide for information about the EEPROM module. Section 18 RAM Block Description This module supports single-cycle misaligned word accesses without wait states. Section 19 MSCAN Block Description Freescale Semiconductor, Inc... There are three MSCAN modules (CAN4, CAN1 and CAN0) implemented on the MC9S12DT128B. Consult the MSCAN Block User Guide for information about the Motorola Scalable CAN Module.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Section 22 Printed Circuit Board Layout Proposal Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Figure 22-1 Recommended PCB Layout for 112LQFP Colpitts Oscillator VREGEN C6 VDDX VSSX VSSA C3 VDD1 C1 VSS1 VSS2 C2 VDD2 VSSR C4 C7 C8 C10 R1 C11 C5 VDDR C9 Freescale Semiconductor, Inc... VDDA Q1 VSSPLL VDDPLL For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Figure 22-2 Recommended PCB Layout for 80QFP Colpitts Oscillator VREGEN C6 VDDX VSSA C3 VDDA VDD1 VSS2 C1 C2 VSS1 VDD2 VSSR C4 C5 VDDR C7 C8 C11 Freescale Semiconductor, Inc... VSSX Q1 C10 C9 R1 VSSPLL VDDPLL For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Figure 22-3 Recommended PCB Layout for 112LQFP Pierce Oscillator VREGEN C6 VDDX VSSX VSSA C3 VDD1 C1 VSS1 VSS2 C2 VDD2 VSSR VSSPLL R3 C4 C5 VDDR R2 Q1 C7 VDDPLL C8 C10 C9 Freescale Semiconductor, Inc... VDDA R1 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Figure 22-4 Recommended PCB Layout for 80QFP Pierce Oscillator VREGEN C6 VDDX VSSX VSSA C3 VDD1 VSS2 C1 C2 VSS1 VDD2 VSSPLL VSSR C4 R3 C5 VDDR R2 Q1 C7 R1 C8 C10 C9 Freescale Semiconductor, Inc... VDDA VSSPLL VDDPLL For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Appendix A Electrical Characteristics A.1 General This introduction is intended to give an overview on several common topics like power supply, current injection etc. A.1.1 Parameter Classification Freescale Semiconductor, Inc... The electrical parameters shown in this supplement are guaranteed by various methods.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 NOTE: In the following context VDD5 is used for either VDDA, VDDR and VDDX; VSS5 is used for either VSSA, VSSR and VSSX unless otherwise noted. IDD5 denotes the sum of the currents flowing into the VDDA, VDDX and VDDR pins. VDD is used for VDD1, VDD2 and VDDPLL, VSS is used for VSS1, VSS2 and VSSPLL. IDD is used for the sum of the currents flowing into VDD1 and VDD2. A.1.3 Pins There are four groups of functional pins.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.1.5 Absolute Maximum Ratings Absolute maximum ratings are stress ratings only. A functional operation under or outside those maxima is not guaranteed. Stress beyond those limits may affect the reliability or cause permanent damage of the device.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot temperature, unless specified otherwise in the device specification. Table A-2 ESD and Latch-up Test Conditions Model Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 calculations refer to Section A.1.8 Power Dissipation and Thermal Characteristics. Table A-4 Operating Conditions Freescale Semiconductor, Inc... Rating Symbol Min Typ Max Unit I/O, Regulator and Analog Supply Voltage VDD5 4.5 5 5.25 V Digital Logic Supply Voltage 1 VDD 2.35 2.5 2.75 V PLL Supply Voltage 2 VDDPLL 2.25 2.5 2.75 V Voltage Difference VDDX to VDDR and VDDA ∆VDDX -0.1 0 0.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 P D = Total Chip Power Dissipation, [W] Θ JA = Package Thermal Resistance, [°C/W] The total power dissipation can be calculated from: P D = P INT + P IO P INT = Chip Internal Power Dissipation, [W] Two cases with internal voltage regulator enabled and disabled must be considered: Freescale Semiconductor, Inc... 1.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table A-5 Thermal Package Characteristics1 Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table A-6 5V I/O Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C 1 Freescale Semiconductor, Inc... 2 Rating Symbol Min Typ Max IH 0.65*VDD5 – IH – – VDD5 + 0.3 Unit P Input High Voltage V T Input High Voltage V P Input Low Voltage V – – 0.35*VDD5 V T Input Low Voltage V VSS5 – 0.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.1.10 Supply Currents This section describes the current consumption characteristics of the device as well as the conditions for the measurements. A.1.10.1 Measurement Conditions All measurements are without output loads. Unless otherwise noted the currents are measured in single chip mode, internal voltage regulator enabled and at 25MHz bus frequency using a 4MHz oscillator in Colpitts mode.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 given. A very good estimate is to take the single chip currents and add the currents due to the external loads.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.2 ATD Characteristics This section describes the characteristics of the analog to digital converter. A.2.1 ATD Operating Characteristics The Table A-8 shows conditions under which the ATD operates. The following constraints exist to obtain full-scale, full range results: VSSA ≤ VRL ≤ VIN ≤ VRH ≤ VDDA. This constraint exists since the sample buffer amplifier can not drive beyond the power supply levels that it ties to.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 specifies results in an error of less than 1/2 LSB (2.5mV) at the maximum leakage current. If device or operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source resistance is allowed. A.2.2.2 Source capacitance When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due to charge sharing with the external and the pin capacitance.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.2.3 ATD accuracy Table A-10 specifies the ATD conversion performance excluding any errors due to current injection, input capacitance and source resistance. Table A-10 ATD Conversion Performance Conditions are shown in Table A-4 unless otherwise noted VREF = VRH - VRL = 5.12V. Resulting to one 8 bit count = 20mV and one 10 bit count = 5mV fATDCLK = 2.0MHz Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 DNL 10-Bit Absolute Error Boundary LSB Vi-1 Vi $3FF 8-Bit Absolute Error Boundary $3FE $3FD $FF $3FB $3FA $3F9 $3F8 $FE $3F7 $3F6 $3F4 8-Bit Resolution $3F5 10-Bit Resolution Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.3 NVM, Flash and EEPROM NOTE: Unless otherwise noted the abbreviation NVM (Non Volatile Memory) is used for both Flash and EEPROM. A.3.1 NVM timing Freescale Semiconductor, Inc... The time base for all NVM program or erase operations is derived from the oscillator. A minimum oscillator frequency fNVMOSC is required for performing program or erase operations.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.3.1.3 Sector Erase Erasing a 512 byte Flash sector or a 4 byte EEPROM sector takes: 1 t era ≈ 4000 ⋅ --------------------f NVMOP The setup times can be ignored for this operation. A.3.1.4 Mass Erase Erasing a NVM block takes: Freescale Semiconductor, Inc... 1 t mass ≈ 20000 ⋅ --------------------f NVMOP The setup times can be ignored for this operation. A.3.1.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 4. Burst Programming operations are not applicable to EEPROM 5. Minimum Erase times are achieved under maximum NVM operating frequency fNVMOP. 6. Minimum time, if first word in the array is not blank 7. Maximum time to complete check on an erased block A.3.2 NVM Reliability The reliability of the NVM blocks is guaranteed by stress test during qualification, constant process monitors and burn-in to screen early life failures.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.4 Voltage Regulator The on-chip voltage regulator is intended to supply the internal logic and oscillator circuits. No external DC load is allowed. Table A-13 Voltage Regulator Recommended Load Capacitances Rating Symbol Min Typ Max Unit CLVDD 220 nF Load Capacitance on VDDPLL CLVDDfcPLL 220 nF Freescale Semiconductor, Inc... Load Capacitance on VDD1, 2 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.5 Reset, Oscillator and PLL This section summarizes the electrical characteristics of the various startup scenarios for Oscillator and Phase-Locked-Loop (PLL). A.5.1 Startup Table A-14 summarizes several startup characteristics explained in this section. Detailed description of the startup behavior can be found in the Clock and Reset Generator (CRG) Block User Guide. Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.5.1.5 Pseudo Stop and Wait Recovery The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in both modes. The controller can be woken up by internal or external interrupts. After twrs the CPU starts fetching the interrupt vector. Freescale Semiconductor, Inc... A.5.2 Oscillator The device features an internal Colpitts and Pierce oscillator.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.5.3 Phase Locked Loop The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO) is also the system clock source in self clock mode. A.5.3.1 XFC Component Selection This section describes the selection of the XFC components to achieve a good filter characteristics. Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 The loop bandwidth fC should be chosen to fulfill the Gardner’s stability criteria by at least a factor of 10, typical values are 50. ζ = 0.9 ensures a good transient response. 2 ⋅ ζ ⋅ f ref f ref 1 f C < ------------------------------------------ ------ → f C < -------------- ;( ζ = 0.9 ) 4 ⋅ 10 2 10  π⋅ ζ+ 1+ζ fC < 25kHz   And finally the frequency relationship is defined as Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 1 0 2 3 N-1 N tmin1 tnom Freescale Semiconductor, Inc... tmax1 tminN tmaxN Figure A-3 Jitter Definitions The relative deviation of tnom is at its maximum for one clock period, and decreases towards zero for larger number of clock periods (N).
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 This is very important to notice with respect to timers, serial modules where a pre-scaler will eliminate the effect of the jitter to a large extent. Table A-16 PLL Characteristics Conditions are shown in Table A-4 unless otherwise noted Freescale Semiconductor, Inc... Num C Rating Symbol Min Typ Max Unit 1 P Self Clock Mode frequency fSCM 1 5.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.6 MSCAN Table A-17 MSCAN Wake-up Pulse Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C Rating Symbol P MSCAN Wake-up dominant pulse filtered tWUP 2 P MSCAN Wake-up dominant pulse pass tWUP 5 Freescale Semiconductor, Inc... 1 Min For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.7 SPI A.7.1 Master Mode Figure A-5 and Figure A-6 illustrate the master mode timing. Timing values are shown in Table A-18. SS1 (OUTPUT) 2 1 Freescale Semiconductor, Inc... SCK (CPOL = 0) (OUTPUT) 4 4 12 SCK (CPOL = 1) (OUTPUT) 5 MISO (INPUT) 6 MSB IN2 BIT 6 . . . 1 9 MOSI (OUTPUT) 3 11 LSB IN 9 MSB OUT2 BIT 6 . . . 1 10 LSB OUT 1.if configured as an output. 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 SS1 (OUTPUT) 1 2 12 11 11 12 3 SCK (CPOL = 0) (OUTPUT) 4 4 SCK (CPOL = 1) (OUTPUT) 5 Freescale Semiconductor, Inc... MISO (INPUT) 6 MSB IN2 BIT 6 . . . 1 LSB IN 10 9 MOSI (OUTPUT) PORT DATA MASTER MSB OUT2 BIT 6 . . . 1 MASTER LSB OUT PORT DATA 1.If configured as output 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.7.2 Slave Mode Figure A-7 and Figure A-8 illustrate the slave mode timing. Timing values are shown in Table A-19. SS (INPUT) 1 12 11 11 12 3 SCK (CPOL = 0) (INPUT) 4 2 4 SCK (CPOL = 1) (INPUT) 8 Freescale Semiconductor, Inc... 7 MISO (OUTPUT) 9 5 MOSI (INPUT) BIT 6 . . . 1 MSB OUT SLAVE 10 10 SLAVE LSB OUT 6 BIT 6 . . .
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table A-19 SPI Slave Mode Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, CLOAD = 200pF on all outputs Freescale Semiconductor, Inc... Num C Rating Symbol Min Typ Max Unit 1 P Operating Frequency fop DC 1/4 fbus 1 P SCK Period tsck = 1.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.8 External Bus Timing A timing diagram of the external multiplexed-bus is illustrated in Figure A-9 with the actual timing values shown on table Table A-20. All major bus signals are included in the diagram. While both a data write and data read cycle are shown, only one or the other would occur on a particular bus cycle. A.8.1 General Muxed Bus Timing Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 1, 2 3 4 ECLK PE4 5 9 Addr/Data (read) PA, PB 6 16 15 7 Freescale Semiconductor, Inc... data 8 14 13 data addr 17 11 data addr data 12 Addr/Data (write) PA, PB 10 19 18 Non-Multiplexed Addresses PK5:0 20 21 22 23 ECS PK7 24 25 26 27 28 29 30 31 32 33 34 R/W PE2 LSTRB PE3 NOACC PE7 35 36 PIPO0 PIPO1, PE6,5 Figure A-9 General External Bus Timing For More Information On This Product, Go to: www.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table A-20 Expanded Bus Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, CLOAD = 50pF Freescale Semiconductor, Inc... Num C Rating Symbol Min Typ Max Unit fo 0 25.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table A-20 Expanded Bus Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, CLOAD = 50pF Num C Rating Symbol Min 32 D NOACC hold time tNOH 2 33 D IPIPO[1:0] delay time tP0D 2 34 D IPIPO[1:0] valid time to E rise (PWEL–tP0D) tP0V 11 35 D IPIPO[1:0] delay time(1) (PWEH-tP1V) tP1D 2 36 D IPIPO[1:0] valid time to E fall tP1V 11 Typ Freescale Semiconductor, Inc... NOTES: 1.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Appendix B Package Information B.1 General Freescale Semiconductor, Inc... This section provides the physical dimensions of the MC9S12DT128B packages. For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 B.2 112-pin LQFP package 0.20 T L-M N 4X PIN 1 IDENT 0.20 T L-M N 4X 28 TIPS 112 J1 85 4X P J1 1 CL 84 VIEW Y 108X G X X=L, M OR N VIEW Y B Freescale Semiconductor, Inc... L V M B1 28 57 29 F D 56 0.13 N S1 A S C2 VIEW AB θ2 0.050 0.10 T T L-M N 112X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS IN MILLIMETERS. 3.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 B.3 80-pin QFP package L 60 41 61 Freescale Semiconductor, Inc... D S M V P B C A-B D 0.20 M B B -A-,-B-,-D- 0.20 L H A-B -B- 0.05 D -A- S S S 40 DETAIL A DETAIL A 21 80 1 0.20 A H A-B M S F 20 -DD S 0.05 A-B J S 0.20 C A-B M S D S D M E DETAIL C C -H- -C- DATUM PLANE 0.20 M C A-B S D S SECTION B-B VIEW ROTATED 90 ° 0.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Freescale Semiconductor, Inc... User Guide End Sheet For More Information On This Product, Go to: www.freescale.
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Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MC9S12DT128B Device User Guide — V01.09 Home Page: www.freescale.com email: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 (800) 521-6274 480-768-2130 support@freescale.