Datasheet

PCF2127AT All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 11 July 2013 40 of 86
NXP Semiconductors
PCF2127AT
Integrated RTC, TCXO and quartz crystal
8.11.4 Countdown timer function
The countdown timer function is controlled by the WD_CD[1:0] bits in register
Watchdg_tim_ctl (see Table 35
).
The timer counts down from the software programmed 8 bit binary value n in register
Watchdg_tim_val. When the counter reaches 1
the countdown timer flag CDTF is set
the counter automatically reloads
and the next time period starts
Loading the counter with 0 effectively stops the timer.
Reading the timer returns the actual value of the countdown counter.
If a new value of n is written before the end of the actual timer period, this value takes
immediate effect. It is not recommended to change n without first disabling the counter by
setting WD_CD[1:0] = 00. The update of n is asynchronous to the timer clock. Therefore
changing it on the fly could result in a corrupted value loaded into the countdown counter.
This can result in an undetermined countdown period for the first period. The countdown
value n will, however, be correctly stored and correctly loaded on subsequent timer
periods.
Table 38. Specification of t
w(rst)
WD_CD[1:0] TF[1:0] t
w(rst)
11 00 244 s
01 15.625 ms
10 15.625 ms
11 15.625 ms
In this example, it is assumed that the countdown timer flag (CDTF) is cleared before the next
countdown period expires and that INT
is set to pulsed mode.
Fig 23. General countdown timer behavior
001aag071
countdown value, n
timer source clock
countdown counter
WD/CD [1:0]
CDTF
INT
0203
00 01
XX
03XX
01 03 02 01 03 02
n
duration of first timer period after
enable may range from n1 to n+1
n
01 03