Datasheet
PCF2127AT All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 11 July 2013 43 of 86
NXP Semiconductors
PCF2127AT
Integrated RTC, TCXO and quartz crystal
8.12 Timestamp function
The PCF2127AT has an active LOW timestamp input pin TS, internally pulled with an
on-chip pull-up resistor to the internal power supply of the device. It also has a timestamp
detection circuit which can detect two different events:
1. Input on pin TS
is driven to an intermediate level between power supply and ground.
2. Input on pin TS is driven to ground.
The timestamp function is enabled by default after power-on and it can be switched off by
setting the control bit TSOFF (register Timestp_ctl).
A most common application of the timestamp function is described in Ref. 3 “
AN10857”.
See Section 8.13.6
for a description of interrupt generation from the timestamp function.
8.12.1 Timestamp flag
1. When the TS input pin is driven to an intermediate level between the power supply
and ground, then the following sequence occurs:
a. The actual date and time are stored in the timestamp registers.
b. The timestamp flag TSF1 (register Control_1) is set.
c. If the TSIE bit (register Control_2) is active, an interrupt on the INT
pin is
generated.
The TSF1 flag can be cleared by command. Clearing the flag will clear the interrupt.
Once TSF1 is cleared, it will only be set again when a new negative edge on pin TS
is
detected.
2. When the TS
input pin is driven to ground, the following sequence occurs:
a. The actual date and time are stored in the timestamp registers.
b. In addition to the TSF1 flag, the TSF2 flag (register Control_2) is set.
c. If the TSIE bit is active, an interrupt on the INT
pin is generated.
Fig 24. Timestamp detection with two push-buttons on the TS pin (for example, for
tamper detection)
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