Datasheet

PCF2127AT All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 11 July 2013 48 of 86
NXP Semiconductors
PCF2127AT
Integrated RTC, TCXO and quartz crystal
watchdog timer
alarm
timestamp
battery switch-over
battery low detection
The control bit TI_TP (register Watchdg_tim_ctl) is used to configure whether the
interrupts generated from the second/minute timer (flag MSF in register Control_2) and
the countdown timer (flag CDTF in register Control_2) are pulsed signals or a
permanently active signal. All the other interrupt sources generate a permanently active
interrupt signal which follows the status of the corresponding flags. When the interrupt
sources are all disabled, INT
remains high-impedance.
The flags MSF, CDTF, AF, TSFx, and BF can be cleared by command.
The flag WDTF is read only. How it can be cleared is explained in Section 8.11.6.
The flag BLF is read only. It is cleared automatically from the battery low detection
circuit when the battery is replaced.
8.13.1 Minute and second interrupts
Minute and second interrupts are generated by predefined timers. The timers can be
enabled independently from one another by the bits MI and SI in register Control_1.
However, a minute interrupt enabled on top of a second interrupt will not be
distinguishable since it will occur at the same time.
The minute/second flag MSF (register Control_2) is set logic 1 when either the seconds or
the minutes counter increments according to the enabled interrupt (see Table 54
). The
MSF flag can be read and cleared by command.
When MSF is set logic 1:
If TI_TP is logic 1, the interrupt is generated as a pulsed signal.
If TI_TP is logic 0, the interrupt is permanently active signal that remains until MSF is
cleared.
Table 54. Effect of bits MI and SI on pin INT and bit MSF
MI SI Result on INT Result on MSF
0 0 no interrupt generated MSF never set
1 0 an interrupt once per minute MSF set when minutes counter increments
0 1 an interrupt once per second MSF set when seconds counter increments
1 1 an interrupt once per second MSF set when seconds counter increments