Datasheet

PCF2127AT All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 11 July 2013 67 of 86
NXP Semiconductors
PCF2127AT
Integrated RTC, TCXO and quartz crystal
[1] For reliable oscillator start-up at power-on: V
DD(po)min
=V
DD(min)
+0.3V.
[2] Timer source clock =
1
⁄
60
Hz, level of pins SDA/CE, SDI, and SCL is V
DD
or V
SS
.
[3] When the device is supplied by the V
BAT
pin instead of the V
DD
pin, the current values for I
BAT
will be as specified for I
DD
under the same
conditions.
[4] The I
2
C-bus and the SPI-bus interface of PCF2127AT are 5 V tolerant.
[5] Tested on sample basis.
[6] For further information, see Figure 47
.
Power management
V
th(sw)bat
battery switch threshold
voltage
-2.5-V
V
th(bat)low
low battery threshold voltage - 2.5 - V
V
th(PFI)
threshold voltage on pin PFI - 1.25 - V
Inputs
[4]
V
I
input voltage 0.5 - V
DD
+ 0.5 V
V
IL
LOW-level input voltage - - 0.25V
DD
V
T
amb
= 20 C to +85 C;
V
DD
>2.0V
- - 0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
--V
I
LI
input leakage current V
I
=V
DD
or V
SS
-0-A
post ESD event 1- +1A
C
i
input capacitance
[5]
--7pF
Outputs
V
O
output voltage on pins CLKOUT, INT, RST,
PFO
, referring to external pull-up
0.5 - 5.5 V
on pin SDO 0.5 - V
BBS
+ 0.5 V
I
OL
LOW-level output current output sink current;
V
OL
= 0.4 V
on pin SDA/CE
[6]
317- mA
on all other outputs 1.0 - - mA
I
OH
HIGH-level output current output source current;
on pin SDO; V
OH
= 3.8 V;
V
DD
= 4.2 V
1.0 - - mA
I
LO
output leakage current V
O
= V
DD
or V
SS
-0-A
post ESD event 1- +1A
Table 62. Static characteristics
…continued
V
DD
= 1.8 V to 4.2 V; V
SS
=0V; T
amb
= 40 C to +85 C, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit