Datasheet

PCF2127AT All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 11 July 2013 7 of 86
NXP Semiconductors
PCF2127AT
Integrated RTC, TCXO and quartz crystal
The register at address 0Fh defines the temperature measurement period and the
clock out mode. The temperature measurement can be selected from every 4 minutes
(default) down to every 30 seconds (see Table 10
). CLKOUT frequencies of
32.768 kHz (default) down to 1 Hz for use as system clock, microcontroller clock, and
so on, can be chosen (see Table 11
).
The registers at addresses 10h and 11h are used for the watchdog and countdown
timer functions. The watchdog timer has four selectable source clocks allowing for
timer periods from less than 1 ms to greater than 4 hours (see Table 37
). Either the
watchdog timer or the countdown timer can be enabled (see Section 8.11
). For the
watchdog timer, it is possible to select whether an interrupt or a pulse on the reset pin
will be generated when the watchdog times out. For the countdown timer, it is only
possible that an interrupt will be generated at the end of the countdown.
The registers at addresses 12h to 18h are used for the timestamp function. When the
trigger event happens, the actual time is saved in the timestamp registers (see
Section 8.12
).
The register at address 19h is used for the correction of the crystal aging effect (see
Section 8.4.1
).
The registers at addresses 1Ah and 1Bh define the RAM address. The register at
address 1Ch (RAM_wrt_cmd) is the RAM write command; the register at 1Dh
(RAM_rd_cmd) is the RAM read command. Data is transferred to or from the RAM by
the serial interface (see Section 8.5
).
The registers Seconds, Minutes, Hours, Days, Months, and Years are all coded in
Binary Coded Decimal (BCD) format to simplify application use. Other registers are
either bit-wise or standard binary.
When one of the RTC registers is written or read, the content of all counters is temporarily
frozen. This prevents a faulty writing or reading of the clock and calendar during a carry
condition (see Section 8.9.8
).