Datasheet

PCF2129 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 19 December 2014 40 of 86
NXP Semiconductors
PCF2129
Accurate RTC with integrated quartz crystal for industrial applications
A most common application of the timestamp function is described in Ref. 3 “AN11186.
See Section 8.12.5
for a description of interrupt generation from the timestamp function.
8.11.1 Timestamp flag
1. When the TS input pin is driven to an intermediate level between the power supply
and ground, either on the falling edge from V
DD
or on the rising edge from ground,
then the following sequence occurs:
a. The actual date and time are stored in the timestamp registers.
b. The timestamp flag TSF1 (register Control_1) is set.
c. If the TSIE bit (register Control_2) is active, an interrupt on the INT
pin is
generated.
The TSF1 flag can be cleared by command. Clearing the flag clears the interrupt.
Once TSF1 is cleared, it will only be set again when a new negative or positive edge
on pin TS
is detected.
2. When the TS
input pin is driven to ground, the following sequence occurs:
a. The actual date and time are stored in the timestamp registers.
b. In addition to the TSF1 flag, the TSF2 flag (register Control_2) is set.
c. If the TSIE bit is active, an interrupt on the INT
pin is generated.
The TSF1 and TSF2 flags can be cleared by command; clearing both flags clears the
interrupt. Once TSF2 is cleared, it will only be set again when TS
pin is driven to
ground once again.
8.11.2 Timestamp mode
The timestamp function has two different modes selected by the control bit TSM
(timestamp mode) in register Timestp_ctl:
If TSM is logic 0 (default): in subsequent trigger events without clearing the timestamp
flags, the last timestamp event is stored
If TSM is logic 1: in subsequent trigger events without clearing the timestamp flags,
the first timestamp event is stored
The timestamp function also depends on the control bit BTSE in register Control_3, see
Section 8.11.4
.