Datasheet

PCF8523 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 17 September 2013 12 of 78
NXP Semiconductors
PCF8523
Real-Time Clock (RTC) and calendar
8.3 Reset
A reset is automatically generated at power-on. A reset can also be initiated with the
software reset command. Software reset command means setting bits 6, 4, and 3 in
register Control_1 (00h) logic 1 and all other bits logic 0 by sending the bit sequence
01011000 (58h), see Figure 7
.
Fig 7. Software reset command
V   $   $  $
36
6'$
6&/
LQWHUQDO
UHVHWVLJQDO
VODYHDGGUHVVE\WH DGGUHVVK VRIWZDUHUHVHWK5:
DDD
Table 10. Register reset values
Bits labeled X are undefined at power-on and unchanged by subsequent resets. Bits labeled - are
not implemented.
Address Register name Bit
7 6 5 4 3 2 1 0
00h Control_1 0 0 0 0 0 0 0 0
01h Control_2 0 0 0 0 0 0 0 0
02h Control_3 1 1 1 - 0 0 0 0
03h Seconds 1 XXXXXXX
04h Minutes - XXXXXXX
05h Hours - - XXXXXX
06h Days - - XXXXXX
07hWeekdays -----XXX
08h Months - - - XXXXX
09h Years XXXXXXXX
0Ah Minute_alarm 1XXXXXXX
0Bh Hour_alarm 1- XXXXXX
0ChDay_alarm 1- XXXXXX
0DhWeekday_alarm1----XXX
0EhOffset 00000000
0FhTmr_CLKOUT_ctrl00000000
10h Tmr_A_freq_ctrl -----111
11h Tmr_A_reg XXXXXXXX
12h Tmr_B_freq_ctrl - 0 0 0 - 1 1 1
13h Tmr_B_reg XXXXXXXX