Datasheet

Product data sheet Rev. 6 — 17 September 2013 35 of 78

NXP Semiconductors

PCF8523

Real-Time Clock (RTC) and calendar

8.9.2 Timer A

With the bit field TAC[1:0] in register Tmr_CLKOUT_ctrl (0Fh) Timer A can be configured

as a countdown timer (TAC[1:0] = 01) or watchdog timer (TAC[1:0] = 10).

8.9.2.1 Watchdog timer function

The 3 bits TAQ[2:0] in register Tmr_A_freq_ctrl (10h) determine one of the five source

clock frequencies for the watchdog timer: 4.096 kHz, 64 Hz, 1 Hz,

⁄

Hz or

⁄

3600

Hz (see

Table 36

The generation of interrupts from the watchdog timer is controlled by using WTAIE bit

(register Control_2).

When configured as a watchdog timer (TAC[1:0] = 10), the 8-bit timer value in register

Tmr_A_reg (11h) determines the watchdog timer-period.

The watchdog timer counts down from value T_A in register Tmr_A_reg (11h). When the

counter reaches 1, the watchdog timer flag WTAF (register Control_2) is set logic 1 on the

next rising edge of the timer clock (see Figure 19

). In that case:

• If WTAIE = 1, an interrupt will be generated

• If WTAIE = 0, no interrupt will be generated

The interrupt generated by the watchdog timer function of timer A may be generated as

pulsed signal or a permanentiy active signal. The TAM bit (register Tmr_CLKOUT_ctrl) is

used to control the interrupt generation mode.

The counter does not automatically reload. When loading the counter with any valid value

of T_A, except 0:

• The flag WTAF is reset (WTAF = 0)

• Interrupt is cleared

• The watchdog timer starts