Datasheet

PCF8523 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 17 September 2013 38 of 78
NXP Semiconductors
PCF8523
Real-Time Clock (RTC) and calendar
When the interrupt generation is enabled (CTAIE = 1) and the countdown timer flag CTAF
is set logic 1, an interrupt signal on INT1
is generated. The interrupt may be generated as
a pulsed signal every countdown period or as a permanently active signal, which follows
the condition of CTAF (register Control_2). The TAM bit (register Tmr_CLKOUT_ctrl) is
used to control this mode selection. The interrupt output may be disabled with the CTAIE
bit (register Control_2).
8.9.3 Timer B
Timer B can only be used as a countdown timer and can be switched on and off by the
TBC bit in register Tmr_CLKOUT_ctrl (0Fh).
The generation of interrupts from the countdown timer is controlled via the CTBIE bit
(register Control_2).
When enabled, it counts down from the software programmed 8 bit binary value T_B in
register Tmr_B_reg (13h). When the counter reaches 1 on the next rising edge of the
timer clock, the following events occur (see Figure 21
):
The countdown timer flag CTBF (register Control_2) is set logic 1
When the interrupt generation is enabled (CTBIE = 1), interrupt signals on INT1 and
INT2
are generated
The counter automatically reloads
The next timer-period starts
At the end of every countdown, the timer sets the countdown timer flag CTBF (register
Control_2). CTBF may only be cleared by using the interface. Instructions, how to clear a
flag, is given in Section 8.7.5
.
When reading the timer, the current countdown value is returned and not the initial
value T_B. Since it is not possible to freeze the countdown timer counter during read
back, it is recommended to read the register twice and check for consistent results.
In this example, it is assumed that the countdown timer flag (CTBF) is cleared before the next
countdown period expires and that interrupt output is set to pulse mode.
Fig 21. General countdown timer behavior
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