Datasheet

PCF8523 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 17 September 2013 43 of 78
NXP Semiconductors
PCF8523
Real-Time Clock (RTC) and calendar
8.10 STOP bit function
The STOP bit function allows the accurate starting of the time circuits. The STOP bit
function causes the upper part of the prescaler (F
2
to F
14
) to be held in reset and thus no
1 Hz ticks are generated. The time circuits can then be set and do not increment until the
STOP bit is released (see Figure 26
).
STOP does not affect the output of 32.768 kHz, 16.384 kHz or 8.192 kHz (see
Section 8.9.1.1
).
The lower two stages of the prescaler (F
0
and F
1
) are not reset. And because the I
2
C-bus
interface is asynchronous to the crystal oscillator, the accuracy of re-starting the time
circuits will be between 0 and one 8.192 kHz cycle (see Figure 27
).
The first increment of the time circuits is between 0.499878 s and 0.500000 s after STOP
is released. The uncertainty is caused by the prescaler bits F
0
and F
1
not being reset (see
Table 45
).
Fig 26. STOP bit
Fig 27. STOP bit release timing
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