Datasheet

PCF8523 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 17 September 2013 47 of 78
NXP Semiconductors
PCF8523
Real-Time Clock (RTC) and calendar
The R/W bit defines the direction of the following single or multiple byte data transfer. For
the format and the timing of the START condition (S), the STOP condition (P) and the
acknowledge bit (A) refer to the I
2
C-bus characteristics (see Ref. 13 on page 71). In the
write mode, a data transfer is terminated by sending either the STOP condition or the
START condition of the next data transfer.
9. Internal circuitry
Fig 32. Bus protocol for write mode
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Fig 33. Bus protocol for read mode
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Fig 34. Device diode protection diagram of PCF8523
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