Datasheet

PCF8523 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 17 September 2013 59 of 78
NXP Semiconductors
PCF8523
Real-Time Clock (RTC) and calendar
16. Bare die outline
[1] Dimension includes saw lane.
[2] P
1
and P
3
: pad size.
[3] P
2
and P
4
: bump size.
Fig 42. Bare die outline of PCF8523U
SFIXBGR
(XURSHDQ
SURMHFWLRQ
%DUHGLHEXPSV 3&)8
GHWDLO<
3
3
3
3
GHWDLO;
$
$
$
3&
[
\



'
(
< ;
Table 50. Dimensions of PCF8523U
Original dimensions are in mm.
Unit (mm) A A
1
A
2
D
[1]
E
[1]
P
1
[2]
P
2
[3]
P
3
[2]
P
4
[3]
Bump pitch
max - 0.018 - - - - 0.059 - 0.059 -
nom 0.22 0.015 0.2 1.58 2.15 0.065 0.056 0.065 0.056 -
min - 0.012 - - - - 0.053 - 0.053 0.149