Datasheet

PCF8563 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 3 April 2012 31 of 50
NXP Semiconductors
PCF8563
Real-time clock/calendar
12. Static characteristics
Table 29. Static characteristics
V
DD
= 1.8 V to 5.5 V; V
SS
=0V; T
amb
=  40  C to +85  C; f
osc
= 32.768 kHz; quartz R
s
=40k  ; C
L
= 8 pF; unless otherwise
specified.
Symbol Parameter Conditions Min Typ Max Unit
Supplies
V
DD
supply voltage interface inactive;
f
SCL
=0Hz;
T
amb
=25C
[1]
1.0 - 5.5 V
interface active;
f
SCL
= 400 kHz
[1]
1.8 - 5.5 V
clock data integrity;
T
amb
=25C
V
low
-5.5V
I
DD
supply current interface active
f
SCL
=400kHz --800A
f
SCL
=100kHz --200A
interface inactive (f
SCL
= 0 Hz); CLKOUT
disabled; T
amb
=25C
[2]
V
DD
= 5.0 V - 275 550 nA
V
DD
= 3.0 V - 250 500 nA
V
DD
= 2.0 V - 225 450 nA
interface inactive (f
SCL
= 0 Hz); CLKOUT
disabled; T
amb
= 40 Cto +85C
[2]
V
DD
= 5.0 V - 500 750 nA
V
DD
= 3.0 V - 400 650 nA
V
DD
= 2.0 V - 400 600 nA
interface inactive (f
SCL
= 0 Hz); CLKOUT
enabled at 32 kHz; T
amb
=25C
[2]
V
DD
= 5.0 V - 825 1600 nA
V
DD
= 3.0 V - 550 1000 nA
V
DD
= 2.0 V - 425 800 nA
interface inactive (f
SCL
= 0 Hz); CLKOUT
enabled at 32 kHz; T
amb
= 40 Cto +85C
[2]
V
DD
= 5.0 V - 950 1700 nA
V
DD
= 3.0 V - 650 1100 nA
V
DD
= 2.0 V - 500 900 nA
Inputs
V
IL
LOW-level input
voltage
V
SS
-0.3V
DD
V
V
IH
HIGH-level
input voltage
0.7V
DD
-V
DD
V
I
LI
input leakage
current
V
I
=V
DD
or V
SS
10 +1A
C
i
input
capacitance
[3]
--7pF