Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsBJTs & IGBTsTransistor

1. Product profile

1.1 General description

NPN Resistor-Equipped Transistor (RET) family in Surface-Mounted Device (SMD)

plastic packages.

1.2 Features and benefits

1.3 Applications

1.4 Quick reference data

PDTC114Y series

NPN resistor-equipped transistors;

R1 = 10 k, R2 = 47 k

Rev. 7 — 18 November 2011 Product data sheet

Table 1. Product overview

Type number Package PNP

complement

Package

configuration

NXP JEITA JEDEC

PDTC114YE SOT416 SC-75 - PDTA114YE ultra small

PDTC114YM SOT883 SC-101 - PDTA114YM leadless ultra small

PDTC114YT SOT23 - TO-236AB PDTA114YT small

PDTC114YU SOT323 SC-70 - PDTA114YU very small

 100 mA output current capability  Reduces component count

 Built-in bias resistors  Reduces pick and place costs

 Simplifies circuit design  AEC-Q101 qualified

 Digital applications in automotive and

industrial segments

 Cost-saving alternative for BC847/857

series in digital applications

 Control of IC inputs  Switching loads

Table 2. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

CEO

collector-emitter voltage open base - - 50 V

output current - - 100 mA

R1 bias resistor 1 (input) 7 10 13 k

R2/R1 bias resistor ratio 3.7 4.7 5.7

Summary of content (17 pages)

PAGE 1
PDTC114Y series NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k Rev. 7 — 18 November 2011 Product data sheet 1. Product profile 1.1 General description NPN Resistor-Equipped Transistor (RET) family in Surface-Mounted Device (SMD) plastic packages. Table 1.
PAGE 2
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 2. Pinning information Table 3. Pinning Pin Description Simplified outline Graphic symbol SOT23; SOT323; SOT416 1 input (base) 2 GND (emitter) 3 3 3 R1 output (collector) 1 R2 1 2 2 006aaa144 sym007 SOT883 1 input (base) 2 GND (emitter) 3 1 3 3 2 output (collector) R1 1 Transparent top view R2 2 sym007 3. Ordering information Table 4.
PAGE 3
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
PAGE 4
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 006aac778 300 Ptot (mW) (1) (2) 200 (3) 100 0 -75 -25 25 75 125 175 Tamb (°C) (1) SOT23; FR4 PCB, standard footprint SOT883; FR4 PCB with 70 m copper strip line, standard footprint (2) SOT323; FR4 PCB, standard footprint (3) SOT416; FR4 PCB, standard footprint Fig 1. Power derating curves 6. Thermal characteristics Table 7.
PAGE 5
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 006aac781 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 0.2 102 0.1 0.05 0.02 10 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration for PDTC114YE (SOT416); typical values 006aac782 103 Zth(j-a) (K/W) duty cycle = 1 0.75 0.5 102 0.33 0.2 0.1 0.05 10 0.02 0.
PAGE 6
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 006aac779 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 102 0.2 0.1 0.05 0.02 10 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for PDTC114YT (SOT23); typical values 006aac780 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 102 0.2 0.1 0.05 0.02 10 0.
PAGE 7
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 7. Characteristics Table 8. Characteristics Tamb = 25 C unless otherwise specified.
PAGE 8
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 006aac786 10 VI(on) (V) 006aac787 10 VI(off) (V) (1) 1 (1) 1 (2) (2) (3) 10-1 10-1 (3) 1 102 10 10-1 10-1 1 IC (mA) VCE = 0.3 V VCE = 5 V (1) Tamb = 40 C (1) Tamb = 40 C (2) Tamb = 25 C (2) Tamb = 25 C (3) Tamb = 100 C (3) Tamb = 100 C Fig 8. 10 IC (mA) On-state input voltage as a function of collector current; typical values 006aac788 3 Cc (pF) Fig 9.
PAGE 9
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. 9. Package outline 0.62 0.55 0.55 0.47 0.95 0.60 1.8 1.4 3 0.45 0.15 0.50 0.46 3 0.30 0.22 1.75 0.9 1.45 0.7 1.02 0.95 0.65 1 0.30 0.22 2 0.30 0.
PAGE 10
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 10. Packing information Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.
PAGE 11
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 11. Soldering 2.2 1.7 solder lands solder resist 1 0.85 2 solder paste 0.5 (3×) occupied area Dimensions in mm 0.6 (3×) 1.3 sot416_fr Reflow soldering is the only recommended soldering method. Fig 16. Reflow soldering footprint PDTC114YE (SOT416/SC-75) 1.3 0.7 R0.05 (12×) solder lands solder resist 0.9 0.6 0.7 solder paste 0.25 (2×) occupied area 0.3 (2×) 0.3 0.4 (2×) 0.
PAGE 12
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 3.3 2.9 1.9 solder lands solder resist 3 2 1.7 solder paste occupied area 0.6 (3×) 0.7 (3×) Dimensions in mm 0.5 (3×) 0.6 (3×) 1 sot023_fr Fig 18. Reflow soldering footprint PDTC114YT (SOT23) 2.2 1.2 (2×) 1.4 (2×) solder lands 4.6 solder resist 2.6 occupied area Dimensions in mm 1.4 preferred transport direction during soldering 2.8 4.5 sot023_fw Fig 19.
PAGE 13
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 2.65 1.85 1.325 solder lands solder resist 2 2.35 0.6 (3×) 3 solder paste 1.3 1 occupied area 0.5 (3×) Dimensions in mm 0.55 (3×) sot323_fr Fig 20. Reflow soldering footprint PDTC114YU (SOT323/SC-70) 4.6 2.575 1.425 (3×) solder lands solder resist occupied area 1.8 3.65 2.1 09 (2×) Dimensions in mm preferred transport direction during soldering sot323_fw Fig 21.
PAGE 14
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 12. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes PDTC114Y_SER v.7 20111118 Product data sheet - PDTC114Y_SERIES v.6 Modifications: • The format of this document has been redesigned to comply with the new identity guidelines of NXP Semiconductors.
PAGE 15
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
PAGE 16
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14.
PAGE 17
PDTC114Y series NXP Semiconductors NPN resistor-equipped transistors; R1 = 10 k, R2 = 47 k 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . .