Datasheet

Philips Semiconductors Product specification
N-channel TrenchMOS transistor PHP20NQ20T, PHB20NQ20T
FEATURES SYMBOL QUICK REFERENCE DATA
’Trench’ technology
• Very low on-state resistance V
DSS
= 200 V
• Fast switching
• Low thermal resistance I
D
= 20 A
R
DS(ON)
130 m
GENERAL DESCRIPTION
N-channel enhancement mode field-effect power transistor in a plastic envelope using trench technology. The device
has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications.
The PHP20NQ20T is supplied in the SOT78 (TO220AB) conventional leaded package.
The PHB20NQ20T is supplied in the SOT404 (D
2
PAK) surface mounting package.
PINNING SOT78 (TO220AB) SOT404 (D
2
PAK)
PIN DESCRIPTION
1 gate
2 drain
1
3 source
tab drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DSS
Drain-source voltage T
j
= 25 ˚C to 175˚C - 200 V
V
DGR
Drain-gate voltage T
j
= 25 ˚C to 175˚C; R
GS
= 20 k - 200 V
V
GS
Gate-source voltage - ± 20 V
I
D
Continuous drain current T
mb
= 25 ˚C; V
GS
= 10 V - 20 A
T
mb
= 100 ˚C; V
GS
= 10 V - 14 A
I
DM
Pulsed drain current T
mb
= 25 ˚C - 80 A
P
D
Total power dissipation T
mb
= 25 ˚C - 150 W
T
j
, T
stg
Operating junction and - 55 175 ˚C
storage temperature
d
g
s
13
tab
2
123
tab
1 It is not possible to make connection to pin:2 of the SOT404 package
August 1999 1 Rev 1.000

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