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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller PBGA 516 (27x27) 32-Bit 264 MHz I/O number 32
12
32-bit Microcontrollers
Qorivva MPC5674F Family
Overview
The Qorivva MPC5674F 32-bit MCU family built on Power Architecture
®
technology is designed
to reduce time to market for efficient engines at lower costs and with higher reliability. In addition
to enabling more fuel-efficient automobiles and the MPC5674F helps designers to meet stricter
government-mandated emissions standards by enabling precise control of engine events without
sacrificing performance.
The Qorivva MPC5674F MCU outpaces all other powertrain MCUs with its 264 MHz clock speed,
4 MB of on-chip flash, 64-channel dual timing units, quad ADCs, on-chip digital signal processing
and 256 KB RAM (for data storage) that can perform knock detection without requiring additional
external components.
The combination of exceptional performance, advanced signal processing capabilities and ultra-
large flash memory array offered in the Qorivva MPC5674F address the growing computational
demands of efficient engine designs, including common rail diesel injection systems, gasoline direct
injection engines, homogenous charge compression ignition systems and hybrid electric vehicles.
Revolutionizing efficient engine designs
with Power Architecture
®
technology
Target Applications
• Powertrainenginecontrol
• Gasolinedirectinjection(GDI)
• Commonraildieselinjectionor
clean diesel
• Hybridelectricvehicles
• Knockdetection
• Cylinderdeactivation
• Transmissioncontrol
• Continuouslyvariabletransmission(CVT)
Qorivva MPC5674F Block Diagram
Qorivva MPC5674F Block Diagram
Main Memory System
Crossbar Switch
Memory Protection Unit
JTAG
Nexus
IEEE
®
ISTO
5001-2003
I/O
Bridge
I/O
Bridge
Boot Assist
Module
(BAM)
EBI
Development
and
Calibration
Bus
SIU
e200z7 Superscalar
CPU
4 MB
Flash
w/ECC
256 KB
SRAM
w/ECC
(32 KB S/B)
Timed I/O System Communications
3x
eSCI
4x
DSPI
8x
Dec
Fil
64-ch.
QUAD
ADCi
2 x eDMA
64- and
32-ch.
Osc/PLL
Interrupt
Controller
4x
FlexCAN
eMIOS
32-ch.
eTPU2
32-ch.
eTPU2
32-ch.
6 KB Data
24 KB Code
RAM
SPE2
VLE
16 KB
I-Cache
16 KB
D-Cache
MMU
FlexRay™
Controller

Summary of content (2 pages)