Computer Hardware User Manual

348
5-28-5 MATRIX INPUT – MTR(––)
OW: Output word
IR, SR, AR, DM, HR, LR
IW: Input word
IR, SR, AR, DM, HR, LR
Ladder Symbols Operand Data Areas
MTR(––)
IW
OW
D
D: First destination word
IR, SR, AR, DM, HR, LR
Limitations D and D+3 must be in the same data area.
Overview When the execution condition is OFF, MTR(––) is not executed. When the
execution condition is ON, MTR(––) inputs data from an 8 × 8 matrix and records
that data in D to D+3. Data for all 64 points in the matrix will be recorded even
when fewer than 64 keys are connected.
01234567
8 9 101112131415
16 17 18 19 20 21 22 23
24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
00 01 02 03 04 05 06 07
OW bits 00 to 07
(for Output Unit
outputs 00 to 07)
IW bits 00 to 07
(for Input Unit inputs 00 to 07)
Bit 08 is turned ON to indi-
cate that the entire matrix
has been read.
Key input data is written
to D through D+3 (see
table below).
00
01
02
03
04
05
06
07
08
A selection signal is output to OW bits 00 to 07 consecutively for 3 cycles. Only
one output bit will be turned on at a time. Bit 08 of OW is turned ON for 3 cycles
after 07 to indicate when each round of reading the matrix has been completed.
When one of the 64 keys is pressed, an input will be received at one of the input
bits. The key that was pressed is identified by comparing the output bit to which
the signal was output and input bit at which it was received.
When an key input is detected, the corresponding bit in D through D+3 is turned
ON. The following table shows the correspondence between keys and bits in D
through D+3.
Word Bits Corresponding Keys
D 00 to 15 0 to 15
D+1 00 to15 16 to 31
D+2 00 to 15 32 to 47
D+3 00 to 15 48 to 63
Advanced I/O Instructions Section 5-28