Service manual

• Line flicker reduction (Digital Scan): this is a feature to reduce the 30 Hz interlace
line flicker.
• Dynamic Noise Reduction: noise affected signals can be improved by combining
the pixel values of the current and past video fields. This is however only
possible in areas without movement.
• Variable Vertical Sample Rate Conversion
• Synchronous No Parity Eight bit Reception an Transmission interface (SNERT-
bus)
Video: High-end Output Processor (HOP, diagram B4)
General
In the HOP (High-end Output Processor, TDA9330) the video processor and digital
deflection processor are integrated. The main functions of the HOP are:
• Video control (contrast, brightness, saturation, etc.).
• 2nd RGB interface for OSD/CC.
• Peak White Limiting.
• Cut-off control and White Drive (RGB outputs).
• Geometry control.
The YUV-signals from the PICNIC are fed to the HOP. In the HOP, the video and
geometry control parts are integrated. In addition, the RGB-signals from TXT/OSD are
inserted via the HOP. This IC has all functions from a video processor and geometry
control.
The geometry part delivers the H-drive, EW-drive, and a drive signal for rotation. The
internal V-drive circuit of the HOP is not used (is explained further on).