Service manual

Error 5
See startup flow chart (figure 5.7).
When POR bit is not communicated during startup, the processor will generate 'HOP
POR not successful.'
Error 6
This will occur in the following cases:
§ SCL or SDA is shorted to ground.
§ SCL is shorted to SDA.
§ SDA or SCL connection at the microcontroller is open.
Error 7
Flash detection: From the EHT info, via D6303 and T7303, a flash will stop the H-drive
and line output stage immediately. The FLS bit in the status register of the HOP is set to
'high.' As the duration of a flash is very short, the FLS bit will be reset to 'low' again after
the flash refresh, so via a slow start the set will be started again.
If this interrupt occurs 5 times within an interval of 10 seconds (indicating an AC power
interruption), the set will go into protection and will generate error 7.
Also HW protections (bridge_prot (see diagram A3), non-Vertical Flyback (measured
with circuitry 7641 on diagram A4)), lead via 'DEFL-prot' line to a 'Standby' situation,
while the processor thinks the set is 'on.' Also here after retrying 5 times, error 7 will be
generated.
Error 8
This protection is activated when the Comb filter circuitry (diagrams C0 and C1) cannot
communicate via I
2
C for a certain time.