User`s manual

6 Addressing

The MPAC-100 occupies a continuous 16-byte block of I/O addresses. For

example, if the base address is set to 300 hex, then the MPAC-100 will occupy address

locations 300 hex to 30F hex. If the computer in which the MPAC-100 is installed is

running PCI Card and Socket Services, the base address is set by the client driver. If

PCI Card and Socket Services are not being used, the base address is set by the

MPAC-100 enabler program.

The first four bytes of address space on the MPAC-100 contain the internal

registers of the SCC. Other Quatech architecture-specific registers occupy eight more

bytes. The remainder of the address space is reserved for future use. The MPAC-100

address map is shown in Table 2.

ReservedBase + F

Reserved

Base + E

Receive FIFO Timeout Register

Base + D

Receive Pattern Count RegisterBase + C

Receive Pattern Character RegisterBase + B

FIFO Control Register

Base + A

FIFO Status Register

Base + 9

Interrupt Status RegisterBase + 8

ReservedBase + 7

Reserved

Base + 6

Configuration Register

Base + 5

Communications RegisterBase + 4

SCC Control Port, Channel BBase + 3

SCC Data Port, Channel B

Base + 2

SCC Control Port, Channel A

Base + 1

SCC Data Port, Channel ABase + 0

Address

Table 2 --- MPAC-100 Address Assignments

Information on the internal registers of the SCC can be found in Table 3 and

Table 4 and in the technical reference manuals available from Zilog. The other onboard

registers are fully described in subsequent chapters of this manual.

Quatech MPAC-100 User's Manual