Specifications

EPC-8A Hardware Reference
44
Setting the VMEbus Access Bit
Before any VMEbus accesses can occur, the VMEbus access bit must be set. The EPC-8A
provides two separate VMEbus access bits corresponding to the two access methods
described above. Both of these access bits are part of the configuration register at port
8102h. In both cases setting the bit (1) enables accesses and clearing the bit (0) disables
accesses. Bit 0 is used to enable direct VMEbus accesses above 256 MByte. Bit 1 enables
E-page accesses. In some cases, the programmer may wish to enable both access methods.
However, if bit 1 is set (E-page accesses enabled), then the 64KByte of upper memory
located from E000:0000 to EFFF:FFFF is not available for use as system memory. If the
application program is going to enable the E-page window, care must be taken to ensure
that the Operating System does not use this address space. Otherwise a memory conflict
occurs that will cause the Operating System to fail at some point.
Real-Mode “E-page” VMEbus Accesses
The following summarizes the source of the VMEbus address lines for accesses through
the “E” page.
A32
A24
A16
It should be noted that the EPC-8A drives all 32 address lines even when performing an
A24 or A16 access. Although the VME specification states that boards should not decode
address lines outside their respective address spaces, some boards do anyway. Because of
this, all “unused” high address lines should be set via their respective registers to all 1’s
before a VME data transfer is executed.
31 24 23 22 21 16 15 0
From
port
8150h
From
port
8151h
From
port
8130h
From
486 address
bits 15–0
23 22 21 16 15 0
From
port
8151h
From
port
8130h
From
486 address
bits 15–0
15 0
From
486 address
bits 15–0