Specifications

EPC-8A Hardware Reference
82
00 Disables events from the watchdog timer
01 8.2 S
10 128 ms
11 1.02 S
A read of the module status/control register also has a side effect of resetting the watchdog
timer. Therefore, if you are using the watchdog timer, the intention is that you are required to
read this register within the defined period of the timer to prevent its generating an interrupt.
VMEbus Mapped Registers
The EPC-8A maps a standard set of VXI configuration registers onto the VMEbus A16
space and thus accessible by other VMEbus modules. These registers are 16-bit registers
occupying 64 bytes of A16 space at a base address defined by the EPC-8A’s logical address.
The base address is
11aa aaaa aa00 0000
where aaaaa aaaa is the value of the ULA field in the response register at I/O port 815C.
The VME-mapped registers are a subset of those defined previously as I/O ports in the
EPC-8A. The registers are dual-ported in that they are accessible both from VME and
from within the EPC-8A as ports in its I/O space. The VME mapped registers are defined
below. Please note that the odd addresses from VME port accesses the lower byte
(registers addressed by even PC I/O addresses). The registers may be accessed using D08
and/or D16 accesses from the VME port.
The registers occupy the first 16 bytes of the 64-byte space, but DTACK (BERR in the case
of an LWORD or Signal FIFO overflow access) are signaled for accesses within the entire 64
byte region. Note that the registers may only be written by using the lower 16 addresses.
Writes between address offsets 16–64 have no effect. For reads, the registers are aliased every
16 bytes (For example, a read at offset 0x10,0x20,0x30 return the data in the ID register). The
lone exception to this rule occurs when accessing the Alternate Response register.
Reads and writes of the registers from VME and as I/O ports have identical results and
effects except where noted in the register descriptions above.
Offset from ULA Upper byte Lower byte
0 ID (8141) ID (8140)
2 Device type (8143) Device type (8142)
4 Status/control (8145) Status/control (8144)
6 Reserved (8147) Reserved (8146)
8 Protocol/Signal (8149) Protocol/Signal (8148)
A Response (814B) Response (814A)
C Message high (814D) Message high (814C)
E Message low (814F) Message low (814E)
2A Alternate Response Alternate Response