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M395T2863QZ4-CE660
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Table Of Contents
1.0 Features
2.0 FBDIMM Generals
2.1 FBDIMM Operation Overview
2.2 FBDIMM Channel Frequency Scaling
2.3 FBDIMM Clocking Scheme
2.4 FBDIMM Protocol
2.5 Southbound Command Delivery
2.6 Basic Timing Diagram
2.7 Advanced Memory Buffer Block Diagram
2.8 Interfaces
3.0 FBD HIGH-SPEED DIFFERENTIAL POINT TO POINT LINK (at 1.5 V) INTERFACE
3.1 DDR2 Channel
3.2 SMBus Slave Interface
3.3 FBD Channel Latency
3.4 Peak Theoretical Throughput
3.5 Hot-add
3.6 Hot remove
3.7 Hot replace
4.0 Pin Configuration
5.0 FBDIMM Functional Block Diagram
5.1 1GB, 128Mx72 Module - M395T2863QZ4
5.2 2GB, 256Mx72 Module - M395T5663QZ4
5.3 4GB, 512Mx72 Module - M395T5160
5.4 4GB, 512Mx72 Module - M395T5163QZ4
5.5 8GB, 1Gx72 Module - M395T1G60QJ4
6.0 Electrical Characteristics
7.0 CHANNEL INITIALIZATION
8.0 Physical Dimensions :
8.1 128Mbx8 based 128Mx72 Module (1 Rank)
8.2 128Mbx8 based 256Mx72 Module (2 Ranks)
8.3 256Mbx4 based 512Mx72 Module (2 Ranks)
8.4 128Mbx8 based 512Mx72 Module (4 Ranks)
8.5 256Mbx4 based 1Gx72 Module (4 Ranks)
Rev. 1.4 May 2009
FBDIMM
DDR2 SDRAM
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Heat Spreader Design Guide
133.35
30.35
±
0.15
67
51
123
Units : Millimeters
8.2 max
1.27
±
0.10
Back
3.0 max
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