Datasheet

AC Electrical Specifications Test Conditions V
CC
e
4.5V and 5.5V (Unless Otherwise Specified) (Note 1)
(Continued)
Symbol Parameter Conditions
SBGRP 9 SBGRP 10 SBGRP 11
Units Notes
a
25
§
C
a
125
§
C
b
55
§
C
Min Max Min Max Min Max
t
RWP
e
t
C
RDY Pulse Width 100 100 100 ns (Note 6)
t
SALE
e
*/4 t
C
a
40 Falling Edge of HLD to
115 115 115 ns (Note 6)
to Rising Edge of ALE
t
HWP
e
t
C
a
10 HLD Pulse Width 110 110 110 ns (Note 6)
t
HAD
e
*/4 t
C
a
85 Rising Edge on HLD to
160 160 160 ns (Note 6)
Rising Edge on HLDA
t
HAE
e
t
C
a
100 Falling Edge on HLD to
200 200 200 ns (Note 6)
Falling Edge on HLDA
t
BF
e
(/2 t
C
a
66 BUS Float before
116 116 116 ns (Note 6)
Falling Edge on HLDA
t
BE
e
(/2 t
C
a
66 BUS Enable from
116 116 116 ns (Note 6)
Rising Edge of HLDA
t
UAS
Address Setup Time to
10 10 10 ns (Note 6)
Falling Edge of URD
t
UAH
Address Hold Time from
10 10 10 ns (Note 6)
Rising Edge of URD
t
RPW
URD Pulse Width 100 100 100 ns (Note 6)
t
OE
URD Falling Edge to
60 60 60 ns (Note 6)
Data Out Valid
t
RDRDY
RDY Delay from
70 70 70 ns (Note 6)
Rising Edge of URD
t
WDW
UWR Pulse Width 40 40 40 ns (Note 6)
t
UDS
Data Invalid before
10 10 10 ns (Note 6)
Trailing Edge of UWR
t
UDH
Data In Hold after
15 15 15 ns (Note 6)
Rising Edge of UWR
t
A
WRRDY Delay from
70 70 70 ns (Note 6)
Rising Edge of UWR
Note 1: Electrical end point testing (when required) for groupsC&Dshall consist only of subgroups 1, 2, 9 and 10.
Note 5: Tested in functional patterns. Not directly measured.
Note 6: C
L
e
70 pF. Input and output levels are per DC characteristics.
Pin Descriptions
The HPC16083 is available in 68-pin PLCC, LDCC, PGA,
and 80-pin PQFP packages.
I/O PORTS
Port A is a 16-bit bidirectional I/O port with a data direction
register to enable each separate pin to be individually de-
fined as an input or output. When accessing external memo-
ry, port A is used as the multiplexed address/data bus.
Port B is a 16-bit port with 12 bits of bidirectional I/O similar
in structure to Port A. Pins B10, B11, B12 and B15 are gen-
eral purpose outputs only in this mode. Port B may also be
configured via a 16-bit function register BFUN to individually
allow each pin to have an alternate function.
B0: TDX UART Data Output
B1:
B2: CKX UART Clock (Input or Output)
B3: T2IO Timer2 I/O Pin
B4: T3IO Timer3 I/O Pin
B5: SO MICROWIRE/PLUS Output
B6: SK MICROWIRE/PLUS Clock (Input or Output)
B7: HLDA
Hold Acknowledge Output
B8: TS0 Timer Synchronous Output
B9: TS1 Timer Synchronous Output
B10: UA0 Address 0 Input for UPI Mode
B11: WRRDY
Write Ready Output for UPI Mode
B12:
B13: TS2 Timer Synchronous Output
11