Datasheet

Operating Modes
To offer the user a variety of I/O and expanded memory
options, the HPC16083 has four operating modes. The
ROMless HPC16003 has one mode of operation. The vari-
ous modes of operation are determined by the state of both
the EXM pin and the EA bit in the PSW register. The state of
the EXM pin determines whether on-chip ROM will be ac-
cessed or external memory will be accessed within the ad-
dress range of the on-chip ROM. The on-chip ROM range of
the HPC16083 is E000 to FFFF (8k bytes). The HPC16003
has no on-chip ROM and is intended for use with external
memory for program storage. A logic ‘‘0’’ state on the EXM
pin will cause the HPC device to address on-chip ROM
when the Program Counter (PC) contains addresses within
the on-chip ROM address range. A logic ‘‘1’’ state on the
EXM pin will cause the HPC device to address memory that
is external to the HPC when the PC contains on-chip ROM
addresses. The EXM pin should always be pulled high (logic
‘‘1’’) on the HPC16003 because no on-chip ROM is avail-
able. The function of the EA bit is to determine the legal
addressing range of the HPC device. A logic ‘‘0’’ state in the
EA bit of the PSW register does two thingsÐaddresses are
limited to the on-chip ROM range and on-chip RAM and
Register range, and the ‘‘illegal address detection’’ feature
of the WATCHDOG logic is engaged. A logic ‘‘1’’ in the EA
bit enables accesses to be made anywhere within the 64k
byte address range and the ‘‘illegal address detection’’ fea-
ture of the WATCHDOG logic is disabled. The EA bit should
be set to ‘‘1’’ by software when using the HPC16003 to
disable the ‘‘illegal address detection’’ feature of WATCH-
DOG.
All HPC devices can be used with external memory. Exter-
nal memory may be any combination of RAM and ROM.
Both 8-bit and 16-bit external data bus modes are available.
Upon entering an operating mode in which external memory
is used, port A becomes the Address/Data bus. Four pins of
port B become the control lines ALE, RD
,WRand HBE. The
High Byte Enable pin (HBE
) is used in 16-bit mode to select
high order memory bytes. The RD
and WR signals are only
generated if the selected address is off-chip. The 8-bit mode
is selected by pulling HBE
high at reset. If HBE is left float-
ing or connected to a memory device chip select at reset,
the 16-bit mode is entered. The following sections describe
the operating modes of the HPC16083 and HPC16003.
Note: The HPC devices use 16-bit words for stack memory. Therefore,
when using the 8-bit mode, User’s Stack must be in internal RAM.
HPC16083 Operating Modes
SINGLE CHIP NORMAL MODE
In this mode, the HPC16083 functions as a self-contained
microcomputer (see
Figure 15 ) with all memory (RAM and
ROM) on-chip. It can address internal memory only, consist-
ing of 8k bytes of ROM (E000 to FFFF) and 256 bytes of on-
chip RAM and registers (0000 to 01FF). The ‘‘illegal address
detection’’ feature of the WATCHDOG is enabled in the Sin-
gle-Chip Normal mode and a WATCHDOG Output (WO
) will
occur if an attempt is made to access addresses that are
outside of the on-chip ROM and RAM range of the device.
Ports A and B are used for I/O functions and not for ad-
dressing external memory. The EXM pin and the EA bit of
the PSW register must both be logic ‘‘0’’ to enter the Single-
Chip Normal mode.
EXPANDED NORMAL MODE
The Expanded Normal mode of operation enables the
HPC16083 to address external memory in addition to the
on-chip ROM and RAM (see Table I). WATCHDOG illegal
address detection is disabled and memory accesses may
be made anywhere in the 64k byte address range without
triggering an illegal address condition. The Expanded Nor-
mal mode is entered with the EXM pin pulled low (logic ‘‘0’’)
and setting the EA bit in the PSW register to ‘‘1’’.
SINGLE-CHIP ROMLESS MODE
In this mode, the on-chip mask programmed ROM of the
HPC16083 is not used. The address space corresponding
to the on-chip ROM is mapped into external memory so 8k
bytes of external memory may be used with the HPC16083
(see Table I). The WATCHDOG circuitry detects illegal ad-
dresses (addresses not within the on-chip ROM and RAM
range). The Single-Chip ROMless mode is entered when the
EXM pin is pulled high (logic ‘‘1’’) and the EA bit is logic ‘‘0’’.
EXPANDED ROMLESS MODE
This mode of operation is similar to Single-Chip ROMless
mode in that no on-chip ROM is used, however, a full 64k
bytes of external memory may be used. The ‘‘illegal address
detection’’ feature of WATCHDOG is disabled. The EXM pin
must be pulled high (logic ‘‘1’’) and the EA bit in the PSW
register set to ‘‘1’’ to enter this mode.
TABLE I. HPC16083 Operating Modes
Operating EXM EA Memory
Mode Pin Bit Configuration
Single-Chip Normal 0 0 E000:FFFF on-chip
Expanded Normal 0 1 E000:FFFF on-chip
0200:DFFF off-chip
Single-Chip ROMless 1 0 E000:FFFF off-chip
Expanded ROMless 1 1 0200:FFFF off-chip
Note: In all operating modes, the on-chip RAM and Registers (0000:01FF)
may be accessed.
16