Ethernet Media Access Controller (EMAC)/ Management Data Input/Output (MDIO) Module User's Guide

www.ti.com
5.17 MAC Interrupt Status (Unmasked) Register (MACINTSTATRAW)
5.18 MAC Interrupt Status (Masked) Register (MACINTSTATMASKED)
Ethernet Media Access Controller (EMAC) Registers
The MAC interrupt status (unmasked) register (MACINTSTATRAW) is shown in Figure 57 and
described in Table 56 .
Figure 57. MAC Interrupt Status (Unmasked) Register (MACINTSTATRAW)
31 16
Reserved
R-0
15 2 1 0
Reserved HOSTPEND STATPEND
R-0 R-0 R-0
LEGEND: R = Read only; - n = value after reset
Table 56. MAC Interrupt Status (Unmasked) Register (MACINTSTATRAW) Field Descriptions
Bit Field Value Description
31-2 Reserved 0 Reserved
1 HOSTPEND 0-1 Host pending interrupt (HOSTPEND); raw interrupt read (before mask)
0 STATPEND 0-1 Statistics pending interrupt (STATPEND); raw interrupt read (before mask)
The MAC interrupt status (masked) register (MACINTSTATMASKED) is shown in Figure 58 and
described in Table 57 .
Figure 58. MAC Interrupt Status (Masked) Register (MACINTSTATMASKED)
31 16
Reserved
R-0
15 2 1 0
Reserved HOSTPEND STATPEND
R-0 R-0 R-0
LEGEND: R = Read only; - n = value after reset
Table 57. MAC Interrupt Status (Masked) Register (MACINTSTATMASKED) Field Descriptions
Bit Field Value Description
31-2 Reserved 0 Reserved
1 HOSTPEND 0-1 Host pending interrupt (HOSTPEND); masked interrupt read
0 STATPEND 0-1 Statistics pending interrupt (STATPEND); masked interrupt read
100 Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) SPRUEQ6 – December 2007
Submit Documentation Feedback