Output (MDIO) Module User's Guide

www.ti.com

4.6 MDIO Link Status Change Interrupt (Masked) Register (LINKINTMASKED)

MDIO Registers

The MDIO link status change interrupt (masked) register (LINKINTMASKED) is shown in Figure 32 and

described in Table 30 .

Figure 32. MDIO Link Status Change Interrupt (Masked) Register (LINKINTMASKED)

31 16

Reserved

R-0

15 2 1 0

Reserved LINKINTMASKED

R-0 R/W1C-0

LEGEND: R = Read only; R/W = Read/Write; W1C = Write 1 to clear, write of 0 has no effect; - n = value after reset

Table 30. MDIO Link Status Change Interrupt (Masked) Register (LINKINTMASKED)

Field Descriptions

Bit Field Value Description

31-2 Reserved 0 Reserved

1-0 LINKINTMASKED 0-3h MDIO Link change interrupt, masked value. When asserted, a bit indicates that there was an MDIO

link change event (that is, change in the LINK register) corresponding to the PHY address in the

USERPHYSEL register and the corresponding LINKINTENB bit was set. LINKINTMASKED[0] and

LINKINTMASKED[1] correspond to USERPHYSEL0 and USERPHYSEL1, respectively. Writing a 1

will clear the event and writing a 0 has no effect.

0 No MDIO link change event.

1 An MDIO link change event (change in the LINK register) corresponding to the PHY address in

MDIO user PHY select register n (USERPHYSEL n) and the LINKINTENB bit in USERPHYSEL n is

set to 1.

SPRUEQ6 – December 2007 Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) 75

Submit Documentation Feedback